diff options
| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-05 08:24:57 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-05 08:24:57 +0000 |
| commit | 63caedf046bcce1f2981c5305d297c2b1890bfc7 (patch) | |
| tree | 258cb5bf2470f25f0abc7bad2cf65720538e9429 /lib/CodeGen/RegAllocLinearScan.cpp | |
| parent | d508776cd5a70afe85a0811ed44c4c71db0cc250 (diff) | |
Remove simple coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10695 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index e677ce8824..b58f630140 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -617,17 +617,6 @@ unsigned RA::getFreePhysReg(Intervals::const_iterator cur) DEBUG(std::cerr << "\t\tgetting free physical register: "); const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg); - if (unsigned reg = cur->hint) { - if (reg >= MRegisterInfo::FirstVirtualRegister && - v2pMap_.find(reg) != v2pMap_.end()) - reg = v2pMap_[reg]; - if (reg && reg < MRegisterInfo::FirstVirtualRegister && - mri_->getRegClass(reg) == rc && !regUse_[reg]) { - DEBUG(std::cerr << mri_->getName(reg) << '\n'); - return reg; - } - } - for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_); i != rc->allocation_order_end(*mf_); ++i) { unsigned reg = *i; |