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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-19 06:19:09 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-19 06:19:09 +0000
commit2acef2da068763d7a48934de96a2fbef440beee5 (patch)
treec255b752aeeaa763b62cfa0915bf823250881f04 /lib/CodeGen/RegAllocLinearScan.cpp
parent04319bb2bda50d2ae7cc284cb1c4e742b44a466b (diff)
Rename reloads/spills to loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11619 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 679122063a..a1d9a116de 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -31,8 +31,8 @@
using namespace llvm;
namespace {
- Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
- Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
+ Statistic<> numStores("ra-linearscan", "Number of stores added");
+ Statistic<> numLoads ("ra-linearscan", "Number of loads added");
class PhysRegTracker {
private:
@@ -650,7 +650,7 @@ void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
DEBUG(std::cerr << "add store for reg" << li->reg << " to "
"stack slot " << slot << " after: ";
mi->print(std::cerr, *tm_));
- ++numSpilled;
+ ++numStores;
mri_->storeRegToStackSlot(*mi->getParent(),
next(mi), li->reg, slot, rc);
}
@@ -666,7 +666,7 @@ void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
DEBUG(std::cerr << "add load for reg" << li->reg
<< " from stack slot " << slot << " before: ";
mi->print(std::cerr, *tm_));
- ++numReloaded;
+ ++numLoads;
mri_->loadRegFromStackSlot(*mi->getParent(),
mi, li->reg, slot, rc);
}
@@ -687,7 +687,7 @@ void RA::addSpillCode(IntervalPtrs::value_type li, int slot)
DEBUG(std::cerr << "add store for reg" << li->reg << " to "
"stack slot " << slot << " after: ";
mi->print(std::cerr, *tm_));
- ++numSpilled;
+ ++numStores;
mri_->storeRegToStackSlot(*mi->getParent(),
next(mi), li->reg, slot, rc);
}