Introducing plugable register allocators and instruction schedulers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 5 insertions, 0 deletions

diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 550d2a4e0c..5463e4e4b6 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -18,6 +18,7 @@
 #include "llvm/Function.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/MRegisterInfo.h"
@@ -42,6 +43,10 @@ namespace {
   static Statistic<> NumBacktracks
   ("regalloc", "Number of times we had to backtrack");
 
+  static RegisterRegAlloc
+    linearscanRegAlloc("linearscan", "  linear scan register allocator",
+                       createLinearScanRegisterAllocator);
+
   static unsigned numIterations = 0;
   static unsigned numIntervals = 0;