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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-03-13 01:23:11 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-03-13 01:23:11 +0000 |
| commit | 7792e980c43536814ea42448db9799b4da32fef6 (patch) | |
| tree | 588136e9c9fab1ac2531f5ce6b1c8ad1fa9738c1 /lib/CodeGen/RegAllocGreedy.cpp | |
| parent | b56130f96b6ca98b0c78caf9f12f3936a4d240a8 (diff) | |
Tell the register allocator about new unused virtual registers.
This allows the allocator to free any resources used by the virtual register,
including physical register assignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127560 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocGreedy.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index 86fd108167..57119aacd2 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -161,6 +161,7 @@ public: private: void LRE_WillEraseInstruction(MachineInstr*); + bool LRE_CanEraseVirtReg(unsigned); bool checkUncachedInterference(LiveInterval&, unsigned); LiveInterval *getSingleInterference(LiveInterval&, unsigned); @@ -249,6 +250,15 @@ void RAGreedy::LRE_WillEraseInstruction(MachineInstr *MI) { VRM->RemoveMachineInstrFromMaps(MI); } +bool RAGreedy::LRE_CanEraseVirtReg(unsigned VirtReg) { + if (unsigned PhysReg = VRM->getPhys(VirtReg)) { + unassign(LIS->getInterval(VirtReg), PhysReg); + return true; + } + // Unassigned virtreg is probably in the priority queue. + // RegAllocBase will erase it after dequeueing. + return false; +} void RAGreedy::releaseMemory() { SpillerInstance.reset(0); |
