diff options
| author | Chris Lattner <sabre@nondot.org> | 2006-05-04 01:15:02 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-04 01:15:02 +0000 |
| commit | ea50fabfd4e5fad25a25b312f64a9b2a53363586 (patch) | |
| tree | 55bebc8fedb5e3b77d9f8d267358126236db411b /lib/CodeGen/MachineInstr.cpp | |
| parent | 34fb2cad46adb39f3c2cc705fbbf439a383d0f65 (diff) | |
Remove a bunch more SparcV9 specific stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 3d65dfd31b..367631c60e 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -141,7 +141,7 @@ MachineInstr::SetMachineOperandConst(unsigned i, void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) { assert(i < getNumOperands()); // must be explicit op - operands[i].opType = MachineOperand::MO_MachineRegister; + operands[i].opType = MachineOperand::MO_VirtualRegister; operands[i].contents.value = NULL; operands[i].extra.regNum = regNum; } @@ -187,9 +187,6 @@ static void print(const MachineOperand &MO, std::ostream &OS, if (MO.hasAllocatedReg()) OutputReg(OS, MO.getReg(), MRI); break; - case MachineOperand::MO_MachineRegister: - OutputReg(OS, MO.getMachineRegNum(), MRI); - break; case MachineOperand::MO_SignExtendedImmed: OS << (long)MO.getImmedValue(); break; @@ -297,9 +294,6 @@ std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) { OutputValue(OS, MO.getVRegValue()); } break; - case MachineOperand::MO_MachineRegister: - OutputReg(OS, MO.getMachineRegNum()); - break; case MachineOperand::MO_SignExtendedImmed: OS << (long)MO.getImmedValue(); break; |