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authorEvan Cheng <evan.cheng@apple.com>2009-12-03 02:31:43 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-12-03 02:31:43 +0000
commit229694f0ee630ceabe96a8bd48952f6740f928b2 (patch)
treeed69406bce00ef30baf875efa8be6db78db24257 /lib/CodeGen/MachineInstr.cpp
parentcb06403145eb7f18457f98077ee64c629a9ad82a (diff)
Fill out codegen SSA updater. It's not yet tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90395 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index f73a5a3621..ba9be6a870 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -1058,6 +1058,20 @@ bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const {
return true;
}
+/// isConstantValuePHI - If the specified instruction is a PHI that always
+/// merges together the same virtual register, return the register, otherwise
+/// return 0.
+unsigned MachineInstr::isConstantValuePHI() const {
+ if (getOpcode() != TargetInstrInfo::PHI)
+ return 0;
+
+ unsigned Reg = getOperand(1).getReg();
+ for (unsigned i = 3, e = getNumOperands(); i < e; i += 2)
+ if (getOperand(i).getReg() != Reg)
+ return 0;
+ return Reg;
+}
+
void MachineInstr::dump() const {
errs() << " " << *this;
}