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authorEvan Cheng <evan.cheng@apple.com>2006-05-12 06:06:34 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-05-12 06:06:34 +0000
commit647c15e58ed4c3fda81041d401ca7547639958dc (patch)
treeff97442a444abe9a59a7d73f1b84599d6dddcc75 /lib/CodeGen/LiveIntervalAnalysis.cpp
parent626da3d9aeb5e18a47a7516cbeae38c9324636e5 (diff)
Backing out fix for PR770. Need to re-apply it after live range splitting is possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28236 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp38
1 files changed, 13 insertions, 25 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 0bff34cef2..8d51f7f938 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -724,12 +724,9 @@ void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) {
MRegisterInfo::isPhysicalRegister(DestReg))
continue;
- // If they are not of compatible register classes, we cannot join them.
- bool Swap = false;
- if (!compatibleRegisterClasses(SrcReg, DestReg, Swap)) {
- DEBUG(std::cerr << "Register classes aren't compatible!\n");
+ // If they are not of the same register class, we cannot join them.
+ if (differingRegisterClasses(SrcReg, DestReg))
continue;
- }
LiveInterval &SrcInt = getInterval(SrcReg);
LiveInterval &DestInt = getInterval(DestReg);
@@ -763,7 +760,7 @@ void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) {
DestInt.join(SrcInt, MIDefIdx);
DEBUG(std::cerr << "Joined. Result = " << DestInt << "\n");
- if (!Swap && !MRegisterInfo::isPhysicalRegister(SrcReg)) {
+ if (!MRegisterInfo::isPhysicalRegister(SrcReg)) {
r2iMap_.erase(SrcReg);
r2rMap_[SrcReg] = DestReg;
} else {
@@ -825,33 +822,24 @@ void LiveIntervals::joinIntervals() {
std::cerr << " reg " << i << " -> reg " << r2rMap_[i] << "\n");
}
-/// Return true if the two specified registers belong to same or compatible
-/// register classes. The registers may be either phys or virt regs.
-bool LiveIntervals::compatibleRegisterClasses(unsigned RegA, unsigned RegB,
- bool &Swap) const {
+/// Return true if the two specified registers belong to different register
+/// classes. The registers may be either phys or virt regs.
+bool LiveIntervals::differingRegisterClasses(unsigned RegA,
+ unsigned RegB) const {
// Get the register classes for the first reg.
if (MRegisterInfo::isPhysicalRegister(RegA)) {
assert(MRegisterInfo::isVirtualRegister(RegB) &&
"Shouldn't consider two physregs!");
- return mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA);
+ return !mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA);
}
// Compare against the regclass for the second reg.
- const TargetRegisterClass *RegClassA = mf_->getSSARegMap()->getRegClass(RegA);
- if (MRegisterInfo::isVirtualRegister(RegB)) {
- const TargetRegisterClass *RegClassB=mf_->getSSARegMap()->getRegClass(RegB);
- if (RegClassA == RegClassB)
- return true;
- else {
- if (RegClassB->hasSubRegClass(RegClassA)) {
- Swap = true;
- return true;
- }
- return RegClassA->hasSubRegClass(RegClassB);
- }
- } else
- return RegClassA->contains(RegB);
+ const TargetRegisterClass *RegClass = mf_->getSSARegMap()->getRegClass(RegA);
+ if (MRegisterInfo::isVirtualRegister(RegB))
+ return RegClass != mf_->getSSARegMap()->getRegClass(RegB);
+ else
+ return !RegClass->contains(RegB);
}
bool LiveIntervals::overlapsAliases(const LiveInterval *LHS,