aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/LiveIntervalAnalysis.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-18 22:29:44 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-06-18 22:29:44 +0000
commit0465bcffbbffb5ff5f420787b4350cb8abb196f7 (patch)
tree0a93caba63fa7bd50f0ab959cd83a4d84e9cb85a /lib/CodeGen/LiveIntervalAnalysis.cpp
parent6a5e2832d0a30719602f9befe61f35ab19299de7 (diff)
TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG
instructions, but it doesn't really understand live ranges, so the first INSERT_SUBREG uses an implicitly defined register. Fix it in LiveVariableAnalysis by adding the <undef> flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106333 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp9
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 22d62524f3..7d23cd0c9d 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -329,9 +329,16 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
MachineInstr *CopyMI = NULL;
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (mi->isExtractSubreg() || mi->isInsertSubreg() || mi->isSubregToReg() ||
- tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg))
+ tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg)) {
CopyMI = mi;
+ // Some of the REG_SEQUENCE lowering in TwoAddressInstrPass creates
+ // implicit defs without really knowing. It shows up as INSERT_SUBREG
+ // using an undefined register.
+ if (mi->isInsertSubreg())
+ mi->getOperand(1).setIsUndef();
+ }
+
VNInfo *ValNo = interval.getNextValue(defIndex, CopyMI, true,
VNInfoAllocator);
assert(ValNo->id == 0 && "First value in interval is not 0?");