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| author | Evan Cheng <evan.cheng@apple.com> | 2009-09-30 08:49:50 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-30 08:49:50 +0000 |
| commit | 629adde69953fa53362d20ddb7b4e67ed78b8ae3 (patch) | |
| tree | 7d283bc27041b900391bed9d9cdf37e3acbd94c2 /lib/CodeGen/LLVMTargetMachine.cpp | |
| parent | 48af260bb1308a2a2cbd6642727465932e7cd0a7 (diff) | |
Add a target hook to add pre- post-regalloc scheduling passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LLVMTargetMachine.cpp')
| -rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index a38d8ccab7..4e713a6ed3 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -317,6 +317,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, PM.add(createPrologEpilogCodeInserter()); printAndVerify(PM); + // Run pre-sched2 passes. + if (addPreSched2(PM, OptLevel)) + printAndVerify(PM); + // Second pass scheduler. if (OptLevel != CodeGenOpt::None) { PM.add(createPostRAScheduler()); |