diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-01 23:28:30 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-01 23:28:30 +0000 |
commit | 396618b43a85e12d290a90b181c6af5d7c0c5f11 (patch) | |
tree | 324b0a889a15d7af2be25fb527333ba50139f453 /lib/CodeGen/AsmPrinter/AsmPrinter.cpp | |
parent | 4a8fefaf8303f30514bc2a40d840a1709dae65cf (diff) |
Switch all register list clients to the new MC*Iterator interface.
No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/AsmPrinter/AsmPrinter.cpp')
-rw-r--r-- | lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index ae498dd27d..eeacc43c09 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -796,8 +796,8 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *TRI = TM.getRegisterInfo(); int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false); - for (const uint16_t *SR = TRI->getSuperRegisters(MLoc.getReg()); - *SR && Reg < 0; ++SR) { + for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid() && Reg < 0; + ++SR) { Reg = TRI->getDwarfRegNum(*SR, false); // FIXME: Get the bit range this register uses of the superregister // so that we can produce a DW_OP_bit_piece |