Implement register class inflation.

When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110703 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 8 insertions, 2 deletions

diff --git a/include/llvm/CodeGen/CalcSpillWeights.h b/include/llvm/CodeGen/CalcSpillWeights.h
index a47d847739..240734fb2e 100644
--- a/include/llvm/CodeGen/CalcSpillWeights.h
+++ b/include/llvm/CodeGen/CalcSpillWeights.h
@@ -32,10 +32,10 @@ namespace llvm {
                    const MachineLoopInfo &loops) :
       mf_(mf), lis_(lis), loops_(loops) {}
 
-    /// CalculateRegClass - recompute the register class for li from its uses.
+    /// CalculateRegClass - recompute the register class for reg from its uses.
     /// Since the register class can affect the allocation hint, this function
     /// should be called before CalculateWeightAndHint if both are called.
-    void CalculateRegClass(LiveInterval &li);
+    void CalculateRegClass(unsigned reg);
 
     /// CalculateWeightAndHint - (re)compute li's spill weight and allocation
     /// hint.
diff --git a/include/llvm/Target/TargetInstrDesc.h b/include/llvm/Target/TargetInstrDesc.h
index 6a08e8f24c..a127aed8f6 100644
--- a/include/llvm/Target/TargetInstrDesc.h
+++ b/include/llvm/Target/TargetInstrDesc.h
@@ -152,6 +152,12 @@ public:
     return -1;
   }
 
+  /// getRegClass - Returns the register class constraint for OpNum, or NULL.
+  const TargetRegisterClass *getRegClass(unsigned OpNum,
+                                         const TargetRegisterInfo *TRI) const {
+    return OpNum < NumOperands ? OpInfo[OpNum].getRegClass(TRI) : 0;
+  }
+
   /// getOpcode - Return the opcode number for this descriptor.
   unsigned getOpcode() const {
     return Opcode;