Rename MRegisterInfo to TargetRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 18 insertions, 15 deletions

diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 36c5d7f8db..60068b6d92 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -28,7 +28,7 @@ class TargetJITInfo;
 class TargetLowering;
 class TargetFrameInfo;
 class MachineCodeEmitter;
-class MRegisterInfo;
+class TargetRegisterInfo;
 class Module;
 class FunctionPassManager;
 class PassManager;
@@ -140,7 +140,7 @@ public:
   /// not, return null.  This is kept separate from RegInfo until RegInfo has
   /// details of graph coloring register allocation removed from it.
   ///
-  virtual const MRegisterInfo *getRegisterInfo() const { return 0; }
+  virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
 
   /// getJITInfo - If this target supports a JIT, return information for it,
   /// otherwise return null.
diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index ae3f27bb3a..2201eb2dcb 100644
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -1,4 +1,4 @@
-//===- Target/MRegisterInfo.h - Target Register Information -----*- C++ -*-===//
+//=== Target/TargetRegisterInfo.h - Target Register Information -*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -13,8 +13,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_TARGET_MREGISTERINFO_H
-#define LLVM_TARGET_MREGISTERINFO_H
+#ifndef LLVM_TARGET_TARGETREGISTERINFO_H
+#define LLVM_TARGET_TARGETREGISTERINFO_H
 
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
@@ -268,12 +268,13 @@ public:
 };
 
 
-/// MRegisterInfo base class - We assume that the target defines a static array
-/// of TargetRegisterDesc objects that represent all of the machine registers
-/// that the target has.  As such, we simply have to track a pointer to this
-/// array so that we can turn register number into a register descriptor.
+/// TargetRegisterInfo base class - We assume that the target defines a static
+/// array of TargetRegisterDesc objects that represent all of the machine
+/// registers that the target has.  As such, we simply have to track a pointer
+/// to this array so that we can turn register number into a register
+/// descriptor.
 ///
-class MRegisterInfo {
+class TargetRegisterInfo {
 public:
   typedef const TargetRegisterClass * const * regclass_iterator;
 private:
@@ -284,10 +285,12 @@ private:
 
   int CallFrameSetupOpcode, CallFrameDestroyOpcode;
 protected:
-  MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
-                regclass_iterator RegClassBegin, regclass_iterator RegClassEnd,
-                int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);
-  virtual ~MRegisterInfo();
+  TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
+                     regclass_iterator RegClassBegin,
+                     regclass_iterator RegClassEnd,
+                     int CallFrameSetupOpcode = -1,
+                     int CallFrameDestroyOpcode = -1);
+  virtual ~TargetRegisterInfo();
 public:
 
   enum {                        // Define some target independent constants
@@ -603,7 +606,7 @@ public:
 // This is useful when building IndexedMaps keyed on virtual registers
 struct VirtReg2IndexFunctor : std::unary_function<unsigned, unsigned> {
   unsigned operator()(unsigned Reg) const {
-    return Reg - MRegisterInfo::FirstVirtualRegister;
+    return Reg - TargetRegisterInfo::FirstVirtualRegister;
   }
 };