Remove RegClass2VRegMap from MachineRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 0 insertions, 12 deletions

diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h
index 74df8da20e..87541086b2 100644
--- a/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -32,11 +32,6 @@ class MachineRegisterInfo {
   IndexedMap<std::pair<const TargetRegisterClass*, MachineOperand*>,
              VirtReg2IndexFunctor> VRegInfo;
 
-  /// RegClassVRegMap - This vector acts as a map from TargetRegisterClass to
-  /// virtual registers. For each target register class, it keeps a list of
-  /// virtual registers belonging to the class.
-  std::vector<unsigned> *RegClass2VRegMap;
-
   /// RegAllocHints - This vector records register allocation hints for virtual
   /// registers. For each virtual register, it keeps a register and hint type
   /// pair making up the allocation hint. Hint type is target specific except
@@ -216,13 +211,6 @@ public:
   ///
   unsigned getNumVirtRegs() const { return VRegInfo.size(); }
 
-  /// getRegClassVirtRegs - Return the list of virtual registers of the given
-  /// target register class.
-  const std::vector<unsigned> &
-  getRegClassVirtRegs(const TargetRegisterClass *RC) const {
-    return RegClass2VRegMap[RC->getID()];
-  }
-
   /// setRegAllocationHint - Specify a register allocation hint for the
   /// specified virtual register.
   void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) {