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authorEvan Cheng <evan.cheng@apple.com>2008-02-18 23:04:32 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-02-18 23:04:32 +0000
commitefec751a1b786724862ceff52748df94873a807e (patch)
treeeaa70165cf0d18db2261a60816bef7d6663661bc /include/llvm/CodeGen
parente0cfecf47d466b5776371526c27969e07177b839 (diff)
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 415e291d13..d6a492d0c1 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -611,6 +611,11 @@ namespace ISD {
/// BUILD_VECTOR where all of the elements are 0 or undef.
bool isBuildVectorAllZeros(const SDNode *N);
+ /// isScalarToVector - Return true if the specified node is a
+ /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
+ /// element is not an undef.
+ bool isScalarToVector(const SDNode *N);
+
/// isDebugLabel - Return true if the specified node represents a debug
/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand
/// is 0).