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authorEvan Cheng <evan.cheng@apple.com>2006-05-09 06:37:48 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-05-09 06:37:48 +0000
commite73701df947d23c65e96abc71a3be40ad77058ee (patch)
tree7f97d9d13b42eb69a08179599e4b823ef5ad9e2c /include/llvm/CodeGen
parent696736be8b80fe3946f73605b46359345afdf57a (diff)
PR 770 - permit coallescing of registers in subset register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28197 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/LiveIntervalAnalysis.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 0ae4b5ad0f..f01608c176 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -167,9 +167,11 @@ namespace llvm {
unsigned SrcReg, unsigned DestReg,
bool isLiveIn = false);
- /// Return true if the two specified registers belong to different
- /// register classes. The registers may be either phys or virt regs.
- bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
+ /// Return true if the two specified registers belong to the same or
+ /// compatible register classes. The registers may be either phys or
+ /// virt regs.
+ bool compatibleRegisterClasses(unsigned RegA, unsigned RegB,
+ bool &Swap) const;
bool AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
LiveInterval &IntB,