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authorMicah Villmow <villmow@gmail.com>2012-07-26 21:22:00 +0000
committerMicah Villmow <villmow@gmail.com>2012-07-26 21:22:00 +0000
commitb3fb028ebde36fab441a731aebe3a21bc30bda9a (patch)
tree0fbd720f5b80fb0bbecd03c7498181cb4d037f09 /include/llvm/CodeGen
parentad2b592cf95e5db34a48c6e2c9b1fe55405355fb (diff)
Add support for v16i32/v16i64 into the code generator. This is required for backends that use i32/i64 vectors for the getSetCCResultType function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160814 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/ValueTypes.h61
-rw-r--r--include/llvm/CodeGen/ValueTypes.td30
2 files changed, 55 insertions, 36 deletions
diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h
index bda43dc50e..994ba5ee52 100644
--- a/include/llvm/CodeGen/ValueTypes.h
+++ b/include/llvm/CodeGen/ValueTypes.h
@@ -68,36 +68,38 @@ namespace llvm {
v2i32 = 22, // 2 x i32
v4i32 = 23, // 4 x i32
v8i32 = 24, // 8 x i32
- v1i64 = 25, // 1 x i64
- v2i64 = 26, // 2 x i64
- v4i64 = 27, // 4 x i64
- v8i64 = 28, // 8 x i64
-
- v2f16 = 29, // 2 x f16
- v2f32 = 30, // 2 x f32
- v4f32 = 31, // 4 x f32
- v8f32 = 32, // 8 x f32
- v2f64 = 33, // 2 x f64
- v4f64 = 34, // 4 x f64
+ v16i32 = 25, // 16 x i32
+ v1i64 = 26, // 1 x i64
+ v2i64 = 27, // 2 x i64
+ v4i64 = 28, // 4 x i64
+ v8i64 = 29, // 8 x i64
+ v16i64 = 30, // 16 x i64
+
+ v2f16 = 31, // 2 x f16
+ v2f32 = 32, // 2 x f32
+ v4f32 = 33, // 4 x f32
+ v8f32 = 34, // 8 x f32
+ v2f64 = 35, // 2 x f64
+ v4f64 = 36, // 4 x f64
FIRST_VECTOR_VALUETYPE = v2i8,
LAST_VECTOR_VALUETYPE = v4f64,
FIRST_INTEGER_VECTOR_VALUETYPE = v2i8,
- LAST_INTEGER_VECTOR_VALUETYPE = v8i64,
+ LAST_INTEGER_VECTOR_VALUETYPE = v16i64,
FIRST_FP_VECTOR_VALUETYPE = v2f16,
LAST_FP_VECTOR_VALUETYPE = v4f64,
- x86mmx = 35, // This is an X86 MMX value
+ x86mmx = 37, // This is an X86 MMX value
- Glue = 36, // This glues nodes together during pre-RA sched
+ Glue = 38, // This glues nodes together during pre-RA sched
- isVoid = 37, // This has no value
+ isVoid = 39, // This has no value
- Untyped = 38, // This value takes a register, but has
+ Untyped = 40, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
- LAST_VALUETYPE = 39, // This always remains at the end of the list.
+ LAST_VALUETYPE = 41, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -211,11 +213,13 @@ namespace llvm {
case v16i16: return i16;
case v2i32:
case v4i32:
- case v8i32: return i32;
+ case v8i32:
+ case v16i32: return i32;
case v1i64:
case v2i64:
case v4i64:
- case v8i64: return i64;
+ case v8i64:
+ case v16i64: return i64;
case v2f16: return f16;
case v2f32:
case v4f32:
@@ -231,7 +235,9 @@ namespace llvm {
llvm_unreachable("Not a vector MVT!");
case v32i8: return 32;
case v16i8:
- case v16i16: return 16;
+ case v16i16:
+ case v16i32:
+ case v16i64:return 16;
case v8i8 :
case v8i16:
case v8i32:
@@ -298,7 +304,9 @@ namespace llvm {
case v4i64:
case v8f32:
case v4f64: return 256;
+ case v16i32:
case v8i64: return 512;
+ case v16i64:return 1024;
}
}
@@ -371,12 +379,14 @@ namespace llvm {
if (NumElements == 2) return MVT::v2i32;
if (NumElements == 4) return MVT::v4i32;
if (NumElements == 8) return MVT::v8i32;
+ if (NumElements == 16) return MVT::v16i32;
break;
case MVT::i64:
if (NumElements == 1) return MVT::v1i64;
if (NumElements == 2) return MVT::v2i64;
if (NumElements == 4) return MVT::v4i64;
if (NumElements == 8) return MVT::v8i64;
+ if (NumElements == 16) return MVT::v16i64;
break;
case MVT::f16:
if (NumElements == 2) return MVT::v2f16;
@@ -514,8 +524,14 @@ namespace llvm {
}
/// is512BitVector - Return true if this is a 512-bit vector type.
- bool is512BitVector() const {
- return isSimple() ? (V == MVT::v8i64) : isExtended512BitVector();
+ inline bool is512BitVector() const {
+ return isSimple() ? (V == MVT::v8i64
+ || V == MVT::v16i32) : isExtended512BitVector();
+ }
+
+ /// is1024BitVector - Return true if this is a 1024-bit vector type.
+ inline bool is1024BitVector() const {
+ return isSimple() ? (V == MVT::v16i64) : isExtended1024BitVector();
}
/// isOverloaded - Return true if this is an overloaded type for TableGen.
@@ -708,6 +724,7 @@ namespace llvm {
bool isExtended128BitVector() const;
bool isExtended256BitVector() const;
bool isExtended512BitVector() const;
+ bool isExtended1024BitVector() const;
EVT getExtendedVectorElementType() const;
unsigned getExtendedVectorNumElements() const;
unsigned getExtendedSizeInBits() const;
diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td
index 6c2269052a..f4b75bd1b1 100644
--- a/include/llvm/CodeGen/ValueTypes.td
+++ b/include/llvm/CodeGen/ValueTypes.td
@@ -45,22 +45,24 @@ def v16i16 : ValueType<256, 21>; // 16 x i16 vector value
def v2i32 : ValueType<64 , 22>; // 2 x i32 vector value
def v4i32 : ValueType<128, 23>; // 4 x i32 vector value
def v8i32 : ValueType<256, 24>; // 8 x i32 vector value
-def v1i64 : ValueType<64 , 25>; // 1 x i64 vector value
-def v2i64 : ValueType<128, 26>; // 2 x i64 vector value
-def v4i64 : ValueType<256, 27>; // 4 x i64 vector value
-def v8i64 : ValueType<512, 28>; // 8 x i64 vector value
+def v16i32 : ValueType<512, 25>; // 16 x i32 vector value
+def v1i64 : ValueType<64 , 26>; // 1 x i64 vector value
+def v2i64 : ValueType<128, 27>; // 2 x i64 vector value
+def v4i64 : ValueType<256, 28>; // 4 x i64 vector value
+def v8i64 : ValueType<512, 29>; // 8 x i64 vector value
+def v16i64 : ValueType<1024,30>; // 16 x i64 vector value
-def v2f16 : ValueType<32 , 29>; // 2 x f16 vector value
-def v2f32 : ValueType<64 , 30>; // 2 x f32 vector value
-def v4f32 : ValueType<128, 31>; // 4 x f32 vector value
-def v8f32 : ValueType<256, 32>; // 8 x f32 vector value
-def v2f64 : ValueType<128, 33>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 34>; // 4 x f64 vector value
+def v2f16 : ValueType<32 , 31>; // 2 x f16 vector value
+def v2f32 : ValueType<64 , 32>; // 2 x f32 vector value
+def v4f32 : ValueType<128, 33>; // 4 x f32 vector value
+def v8f32 : ValueType<256, 34>; // 8 x f32 vector value
+def v2f64 : ValueType<128, 35>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 36>; // 4 x f64 vector value
-def x86mmx : ValueType<64 , 35>; // X86 MMX value
-def FlagVT : ValueType<0 , 36>; // Pre-RA sched glue
-def isVoid : ValueType<0 , 37>; // Produces no value
-def untyped: ValueType<8 , 38>; // Produces an untyped value
+def x86mmx : ValueType<64 , 37>; // X86 MMX value
+def FlagVT : ValueType<0 , 38>; // Pre-RA sched glue
+def isVoid : ValueType<0 , 39>; // Produces no value
+def untyped: ValueType<8 , 40>; // Produces an untyped value
def MetadataVT: ValueType<0, 250>; // Metadata