Rename MRegisterInfo to TargetRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8

11 files changed, 35 insertions, 34 deletions

diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h
index 1c9a0c179d..8fe3b16c1b 100644
--- a/include/llvm/CodeGen/CallingConvLower.h
+++ b/include/llvm/CodeGen/CallingConvLower.h
@@ -19,7 +19,7 @@
 #include "llvm/CodeGen/ValueTypes.h"
 
 namespace llvm {
-  class MRegisterInfo;
+  class TargetRegisterInfo;
   class TargetMachine;
   class CCState;
   class SDNode;
@@ -107,7 +107,7 @@ class CCState {
   unsigned CallingConv;
   bool IsVarArg;
   const TargetMachine &TM;
-  const MRegisterInfo &MRI;
+  const TargetRegisterInfo &TRI;
   SmallVector<CCValAssign, 16> &Locs;
   
   unsigned StackOffset;
diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h
index 3d6611e119..52bbf78e3b 100644
--- a/include/llvm/CodeGen/LiveInterval.h
+++ b/include/llvm/CodeGen/LiveInterval.h
@@ -30,7 +30,7 @@
 
 namespace llvm {
   class MachineInstr;
-  class MRegisterInfo;
+  class TargetRegisterInfo;
   struct LiveInterval;
 
   /// VNInfo - If the value number definition is undefined (e.g. phi
@@ -346,9 +346,9 @@ namespace llvm {
       return beginNumber() < other.beginNumber();
     }
 
-    void print(std::ostream &OS, const MRegisterInfo *MRI = 0) const;
-    void print(std::ostream *OS, const MRegisterInfo *MRI = 0) const {
-      if (OS) print(*OS, MRI);
+    void print(std::ostream &OS, const TargetRegisterInfo *TRI = 0) const;
+    void print(std::ostream *OS, const TargetRegisterInfo *TRI = 0) const {
+      if (OS) print(*OS, TRI);
     }
     void dump() const;
 
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index d8762cacb6..34a05ffc7a 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -33,7 +33,7 @@ namespace llvm {
 
   class LiveVariables;
   class MachineLoopInfo;
-  class MRegisterInfo;
+  class TargetRegisterInfo;
   class MachineRegisterInfo;
   class TargetInstrInfo;
   class TargetRegisterClass;
@@ -43,7 +43,7 @@ namespace llvm {
   class LiveIntervals : public MachineFunctionPass {
     MachineFunction* mf_;
     const TargetMachine* tm_;
-    const MRegisterInfo* mri_;
+    const TargetRegisterInfo* tri_;
     const TargetInstrInfo* tii_;
     LiveVariables* lv_;
 
diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h
index 7d39b7af8a..47b1b20e37 100644
--- a/include/llvm/CodeGen/LiveVariables.h
+++ b/include/llvm/CodeGen/LiveVariables.h
@@ -37,7 +37,7 @@
 
 namespace llvm {
 
-class MRegisterInfo;
+class TargetRegisterInfo;
 
 class LiveVariables : public MachineFunctionPass {
 public:
@@ -130,7 +130,7 @@ private:
 private:   // Intermediate data structures
   MachineFunction *MF;
 
-  const MRegisterInfo *RegInfo;
+  const TargetRegisterInfo *RegInfo;
 
   // PhysRegInfo - Keep track of which instruction was the last def/use of a
   // physical register. This is a purely local property, because all physical
diff --git a/include/llvm/CodeGen/MachineFrameInfo.h b/include/llvm/CodeGen/MachineFrameInfo.h
index 80bce9cba6..9934bf6a94 100644
--- a/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/include/llvm/CodeGen/MachineFrameInfo.h
@@ -159,8 +159,8 @@ class MachineFrameInfo {
   /// MMI - This field is set (via setMachineModuleInfo) by a module info
   /// consumer (ex. DwarfWriter) to indicate that frame layout information
   /// should be acquired.  Typically, it's the responsibility of the target's
-  /// MRegisterInfo prologue/epilogue emitting code to inform MachineModuleInfo
-  /// of frame layouts.
+  /// TargetRegisterInfo prologue/epilogue emitting code to inform
+  /// MachineModuleInfo of frame layouts.
   MachineModuleInfo *MMI;
   
   /// TargetFrameInfo - Target information about frame layout.
@@ -328,8 +328,8 @@ public:
     CSInfo = CSI;
   }
 
-  /// getMachineModuleInfo - Used by a prologue/epilogue emitter (MRegisterInfo)
-  /// to provide frame layout information. 
+  /// getMachineModuleInfo - Used by a prologue/epilogue
+  /// emitter (TargetRegisterInfo) to provide frame layout information. 
   MachineModuleInfo *getMachineModuleInfo() const { return MMI; }
 
   /// setMachineModuleInfo - Used by a meta info consumer (DwarfWriter) to
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 8b0931ac61..8dab6d527f 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -22,7 +22,7 @@
 namespace llvm {
 
 class TargetInstrDesc;
-class MRegisterInfo;
+class TargetRegisterInfo;
 
 template <typename T> struct ilist_traits;
 template <typename T> struct ilist;
@@ -167,19 +167,20 @@ public:
   /// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
   /// add a implicit operand if it's not found. Returns true if the operand
   /// exists / is added.
-  bool addRegisterKilled(unsigned IncomingReg, const MRegisterInfo *RegInfo,
+  bool addRegisterKilled(unsigned IncomingReg,
+                         const TargetRegisterInfo *RegInfo,
                          bool AddIfNotFound = false);
   
   /// addRegisterDead - We have determined MI defined a register without a use.
   /// Look for the operand that defines it and mark it as IsDead. If
   /// AddIfNotFound is true, add a implicit operand if it's not found. Returns
   /// true if the operand exists / is added.
-  bool addRegisterDead(unsigned IncomingReg, const MRegisterInfo *RegInfo,
+  bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
                        bool AddIfNotFound = false);
 
   /// copyKillDeadInfo - copies killed/dead information from one instr to another
   void copyKillDeadInfo(MachineInstr *OldMI,
-                        const MRegisterInfo *RegInfo);
+                        const TargetRegisterInfo *RegInfo);
 
   //
   // Debugging support
diff --git a/include/llvm/CodeGen/MachineLocation.h b/include/llvm/CodeGen/MachineLocation.h
index 8ba2fa721e..51c4295974 100644
--- a/include/llvm/CodeGen/MachineLocation.h
+++ b/include/llvm/CodeGen/MachineLocation.h
@@ -32,7 +32,7 @@ private:
 public:
   enum {
     // The target register number for an abstract frame pointer. The value is
-    // an arbitrary value greater than MRegisterInfo::FirstVirtualRegister.
+    // an arbitrary value greater than TargetRegisterInfo::FirstVirtualRegister.
     VirtualFP = ~0U
   };
   MachineLocation()
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h
index 2a62a83130..5b84922b55 100644
--- a/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -14,7 +14,7 @@
 #ifndef LLVM_CODEGEN_MACHINEREGISTERINFO_H
 #define LLVM_CODEGEN_MACHINEREGISTERINFO_H
 
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/iterator"
 #include <vector>
@@ -26,7 +26,7 @@ namespace llvm {
 class MachineRegisterInfo {
   /// VRegInfo - Information we keep for each virtual register.  The entries in
   /// this vector are actually converted to vreg numbers by adding the 
-  /// MRegisterInfo::FirstVirtualRegister delta to their index.
+  /// TargetRegisterInfo::FirstVirtualRegister delta to their index.
   ///
   /// Each element in this list contains the register class of the vreg and the
   /// start of the use/def list for the register.
@@ -54,7 +54,7 @@ class MachineRegisterInfo {
   MachineRegisterInfo(const MachineRegisterInfo&); // DO NOT IMPLEMENT
   void operator=(const MachineRegisterInfo&);      // DO NOT IMPLEMENT
 public:
-  explicit MachineRegisterInfo(const MRegisterInfo &MRI);
+  explicit MachineRegisterInfo(const TargetRegisterInfo &TRI);
   ~MachineRegisterInfo();
   
   //===--------------------------------------------------------------------===//
@@ -98,16 +98,16 @@ public:
   /// getRegUseDefListHead - Return the head pointer for the register use/def
   /// list for the specified virtual or physical register.
   MachineOperand *&getRegUseDefListHead(unsigned RegNo) {
-    if (RegNo < MRegisterInfo::FirstVirtualRegister)
+    if (RegNo < TargetRegisterInfo::FirstVirtualRegister)
       return PhysRegUseDefLists[RegNo];
-    RegNo -= MRegisterInfo::FirstVirtualRegister;
+    RegNo -= TargetRegisterInfo::FirstVirtualRegister;
     return VRegInfo[RegNo].second;
   }
   
   MachineOperand *getRegUseDefListHead(unsigned RegNo) const {
-    if (RegNo < MRegisterInfo::FirstVirtualRegister)
+    if (RegNo < TargetRegisterInfo::FirstVirtualRegister)
       return PhysRegUseDefLists[RegNo];
-    RegNo -= MRegisterInfo::FirstVirtualRegister;
+    RegNo -= TargetRegisterInfo::FirstVirtualRegister;
     return VRegInfo[RegNo].second;
   }
   
@@ -117,7 +117,7 @@ public:
   
   /// getRegClass - Return the register class of the specified virtual register.
   const TargetRegisterClass *getRegClass(unsigned Reg) {
-    Reg -= MRegisterInfo::FirstVirtualRegister;
+    Reg -= TargetRegisterInfo::FirstVirtualRegister;
     assert(Reg < VRegInfo.size() && "Invalid vreg!");
     return VRegInfo[Reg].first;
   }
@@ -142,7 +142,7 @@ public:
   /// getLastVirtReg - Return the highest currently assigned virtual register.
   ///
   unsigned getLastVirtReg() const {
-    return VRegInfo.size()+MRegisterInfo::FirstVirtualRegister-1;
+    return VRegInfo.size()+TargetRegisterInfo::FirstVirtualRegister-1;
   }
   
   /// getVRegDef - Return the machine instr that defines the specified virtual
diff --git a/include/llvm/CodeGen/RegisterCoalescer.h b/include/llvm/CodeGen/RegisterCoalescer.h
index 5ee771c065..8ce824a1ae 100644
--- a/include/llvm/CodeGen/RegisterCoalescer.h
+++ b/include/llvm/CodeGen/RegisterCoalescer.h
@@ -16,7 +16,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Support/Debug.h"
 
 #ifndef LLVM_CODEGEN_REGISTER_COALESCER_H
@@ -29,7 +29,7 @@ namespace llvm
   class AnalysisUsage;
   class LiveIntervals;
   class MachineInstr;
-  class MRegisterInfo;
+  class TargetRegisterInfo;
 
   /// An abstract interface for register coalescers.  Coalescers must
   /// implement this interface to be part of the coalescer analysis
diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 0b726fc5f7..ecfa7d789f 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -22,7 +22,7 @@
 
 namespace llvm {
 
-class MRegisterInfo;
+class TargetRegisterInfo;
 class TargetInstrInfo;
 class TargetRegisterClass;
 
@@ -127,7 +127,7 @@ public:
   }
 
 private:
-  const MRegisterInfo *RegInfo;
+  const TargetRegisterInfo *RegInfo;
   const TargetInstrInfo *TII;
 
   /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index fdd5700357..9c24f17e5f 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -28,7 +28,7 @@ namespace llvm {
   class MachineModuleInfo;
   class MachineRegisterInfo;
   class MachineInstr;
-  class MRegisterInfo;
+  class TargetRegisterInfo;
   class SelectionDAG;
   class SelectionDAGISel;
   class TargetInstrInfo;
@@ -243,7 +243,7 @@ namespace llvm {
     MachineBasicBlock *BB;                // Current basic block
     const TargetMachine &TM;              // Target processor
     const TargetInstrInfo *TII;           // Target instruction information
-    const MRegisterInfo *MRI;             // Target processor register info
+    const TargetRegisterInfo *TRI;        // Target processor register info
     MachineFunction *MF;                  // Machine function
     MachineRegisterInfo &RegInfo;         // Virtual/real register map
     MachineConstantPool *ConstPool;       // Target constant pool