diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-26 17:09:29 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-26 17:09:29 +0000 |
| commit | 34f5a2b596236a5452ddc664066138ca7a0c7af2 (patch) | |
| tree | 65b401edf6787c8434541d44e0bf9c8df7eb7c93 /include/llvm/CodeGen | |
| parent | 0e20eb496ef65988023ab439259010cac82cd1ca (diff) | |
Allow targets to inject passes before the virtual register rewriter.
Such passes can be used to tweak the register assignments in a
target-dependent way, for example to avoid write-after-write
dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159209 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
| -rw-r--r-- | include/llvm/CodeGen/Passes.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index cc3b3d7235..206bc2e123 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -175,6 +175,18 @@ protected: /// LLVMTargetMachine provides standard regalloc passes for most targets. virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass); + /// addPreRewrite - Add passes to the optimized register allocation pipeline + /// after register allocation is complete, but before virtual registers are + /// rewritten to physical registers. + /// + /// These passes must preserve VirtRegMap and LiveIntervals, and when running + /// after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. + /// When these passes run, VirtRegMap contains legal physreg assignments for + /// all virtual registers. + virtual bool addPreRewrite() { + return false; + } + /// addFinalizeRegAlloc - This method may be implemented by targets that want /// to run passes within the regalloc pipeline, immediately after the register /// allocation pass itself. These passes run as soon as virtual regisiters |
