llvm.memory.barrier, and impl for x86 and alpha

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 8 insertions, 0 deletions

diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 4f56b9b553..415e291d13 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -589,6 +589,14 @@ namespace ISD {
     // TRAP - Trapping instruction
     TRAP,
 
+    // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, 
+    //                       store-store, device)
+    // This corresponds to the atomic.barrier intrinsic.
+    // it takes an input chain, 4 operands to specify the type of barrier, an
+    // operand specifying if the barrier applies to device and uncached memory
+    // and produces an output chain.
+    MEMBARRIER,
+
     // BUILTIN_OP_END - This must be the last enum value in this list.
     BUILTIN_OP_END
   };