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authorEvan Cheng <evan.cheng@apple.com>2009-12-03 02:31:43 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-12-03 02:31:43 +0000
commit229694f0ee630ceabe96a8bd48952f6740f928b2 (patch)
treeed69406bce00ef30baf875efa8be6db78db24257 /include/llvm/CodeGen
parentcb06403145eb7f18457f98077ee64c629a9ad82a (diff)
Fill out codegen SSA updater. It's not yet tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90395 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h5
-rw-r--r--include/llvm/CodeGen/MachineSSAUpdater.h29
2 files changed, 27 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index c620449401..87b67d6242 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -320,6 +320,11 @@ public:
/// loads the instruction does are invariant (if it does multiple loads).
bool isInvariantLoad(AliasAnalysis *AA) const;
+ /// isConstantValuePHI - If the specified instruction is a PHI that always
+ /// merges together the same virtual register, return the register, otherwise
+ /// return 0.
+ unsigned isConstantValuePHI() const;
+
//
// Debugging support
//
diff --git a/include/llvm/CodeGen/MachineSSAUpdater.h b/include/llvm/CodeGen/MachineSSAUpdater.h
index a785ab8cfa..ca8eca82a8 100644
--- a/include/llvm/CodeGen/MachineSSAUpdater.h
+++ b/include/llvm/CodeGen/MachineSSAUpdater.h
@@ -16,13 +16,18 @@
namespace llvm {
class MachineBasicBlock;
+ class MachineFunction;
class MachineInstr;
+ class MachineOperand;
+ class MachineRegisterInfo;
+ class TargetInstrInfo;
+ class TargetRegisterClass;
template<typename T> class SmallVectorImpl;
-/// SSAUpdater - This class updates SSA form for a set of values defined in
-/// multiple blocks. This is used when code duplication or another unstructured
-/// transformation wants to rewrite a set of uses of one value with uses of a
-/// set of values.
+/// MachineSSAUpdater - This class updates SSA form for a set of virtual
+/// registers defined in multiple blocks. This is used when code duplication
+/// or another unstructured transformation wants to rewrite a set of uses of one
+/// vreg with uses of a set of vregs.
class MachineSSAUpdater {
/// AvailableVals - This keeps track of which value to use on a per-block
/// basis. When we insert PHI nodes, we keep track of them here.
@@ -35,18 +40,28 @@ class MachineSSAUpdater {
//std::vector<std::pair<MachineBasicBlock*, unsigned > > IncomingPredInfo;
void *IPI;
+ /// VR - Current virtual register whose uses are being updated.
+ unsigned VR;
+
+ /// VRC - Register class of the current virtual register.
+ const TargetRegisterClass *VRC;
+
/// InsertedPHIs - If this is non-null, the MachineSSAUpdater adds all PHI
/// nodes that it creates to the vector.
SmallVectorImpl<MachineInstr*> *InsertedPHIs;
+
+ const TargetInstrInfo *TII;
+ MachineRegisterInfo *MRI;
public:
/// MachineSSAUpdater constructor. If InsertedPHIs is specified, it will be
/// filled in with all PHI Nodes created by rewriting.
- explicit MachineSSAUpdater(SmallVectorImpl<MachineInstr*> *InsertedPHIs = 0);
+ explicit MachineSSAUpdater(MachineFunction &MF,
+ SmallVectorImpl<MachineInstr*> *InsertedPHIs = 0);
~MachineSSAUpdater();
/// Initialize - Reset this object to get ready for a new set of SSA
/// updates.
- void Initialize();
+ void Initialize(unsigned V);
/// AddAvailableValue - Indicate that a rewritten value is available at the
/// end of the specified block with the specified value.
@@ -86,7 +101,7 @@ public:
/// will not work if the use is supposed to be rewritten to a value defined in
/// the same block as the use, but above it. Any 'AddAvailableValue's added
/// for the use's block will be considered to be below it.
- void RewriteUse(unsigned &U);
+ void RewriteUse(MachineOperand &U);
private:
unsigned GetValueAtEndOfBlockInternal(MachineBasicBlock *BB);