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authorBill Wendling <isanbard@gmail.com>2008-05-19 20:15:12 +0000
committerBill Wendling <isanbard@gmail.com>2008-05-19 20:15:12 +0000
commit13d57320bd212483463d4f8992d5787b29eda5df (patch)
tree4161a4c6087bd4741c341ac401969d3cf82fda65 /include/llvm/CodeGen
parent9d60ba9d28c21145515878294b07c91622435632 (diff)
Remove warnings about unused parameters and shadowed variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h15
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h4
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h18
3 files changed, 17 insertions, 20 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index d49c7db6fd..218a3377d8 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -59,26 +59,23 @@ namespace llvm {
/// other instruction is available, issue it first.
/// * NoopHazard: issuing this instruction would break the program. If
/// some other instruction can be issued, do so, otherwise issue a noop.
- virtual HazardType getHazardType(SDNode *Node) {
+ virtual HazardType getHazardType(SDNode *) {
return NoHazard;
}
/// EmitInstruction - This callback is invoked when an instruction is
/// emitted, to advance the hazard state.
- virtual void EmitInstruction(SDNode *Node) {
- }
+ virtual void EmitInstruction(SDNode *) {}
/// AdvanceCycle - This callback is invoked when no instructions can be
/// issued on this cycle without a hazard. This should increment the
/// internal state of the hazard recognizer so that previously "Hazard"
/// instructions will now not be hazards.
- virtual void AdvanceCycle() {
- }
+ virtual void AdvanceCycle() {}
/// EmitNoop - This callback is invoked when a noop was added to the
/// instruction stream.
- virtual void EmitNoop() {
- }
+ virtual void EmitNoop() {}
};
/// SDep - Scheduling dependency. It keeps track of dependent nodes,
@@ -236,9 +233,9 @@ namespace llvm {
/// ScheduledNode - As each node is scheduled, this method is invoked. This
/// allows the priority function to adjust the priority of node that have
/// already been emitted.
- virtual void ScheduledNode(SUnit *Node) {}
+ virtual void ScheduledNode(SUnit *) {}
- virtual void UnscheduledNode(SUnit *Node) {}
+ virtual void UnscheduledNode(SUnit *) {}
};
class ScheduleDAG {
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 02f5cbc9f6..5094f023f5 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -162,8 +162,8 @@ public:
MVT::ValueType VT3) {
return getVTList(VT1, VT2, VT3).VTs;
}
- const MVT::ValueType *getNodeValueTypes(std::vector<MVT::ValueType> &VTList) {
- return getVTList(&VTList[0], (unsigned)VTList.size()).VTs;
+ const MVT::ValueType *getNodeValueTypes(std::vector<MVT::ValueType> &vtList) {
+ return getVTList(&vtList[0], (unsigned)vtList.size()).VTs;
}
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 5cfc1661a0..8388ab91f2 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1964,15 +1964,15 @@ protected:
*/
SDUse Ops[4];
public:
- LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned NumOperands,
+ LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
SDVTList VTs, ISD::MemIndexedMode AM, MVT::ValueType VT,
const Value *SV, int SVO, unsigned Align, bool Vol)
: SDNode(NodeTy, VTs),
AddrMode(AM), MemoryVT(VT),
SrcValue(SV), SVOffset(SVO), Alignment(Align), IsVolatile(Vol) {
- for (unsigned i = 0; i != NumOperands; ++i)
+ for (unsigned i = 0; i != numOperands; ++i)
Ops[i] = Operands[i];
- InitOperands(Ops, NumOperands);
+ InitOperands(Ops, numOperands);
assert(Align != 0 && "Loads and stores should have non-zero aligment");
assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
"Only indexed loads and stores have a non-undef offset operand");
@@ -2004,7 +2004,7 @@ public:
/// reference performed by this load or store.
MachineMemOperand getMemOperand() const;
- static bool classof(const LSBaseSDNode *N) { return true; }
+ static bool classof(const LSBaseSDNode *) { return true; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::LOAD ||
N->getOpcode() == ISD::STORE;
@@ -2134,11 +2134,11 @@ struct ilist_traits<SDNode> {
//static SDNode *createNode(const SDNode &V) { return new SDNode(V); }
- void addNodeToList(SDNode *NTy) {}
- void removeNodeFromList(SDNode *NTy) {}
- void transferNodesFromList(iplist<SDNode, ilist_traits> &L2,
- const ilist_iterator<SDNode> &X,
- const ilist_iterator<SDNode> &Y) {}
+ void addNodeToList(SDNode *) {}
+ void removeNodeFromList(SDNode *) {}
+ void transferNodesFromList(iplist<SDNode, ilist_traits> &,
+ const ilist_iterator<SDNode> &,
+ const ilist_iterator<SDNode> &) {}
};
namespace ISD {