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authorEvan Cheng <evan.cheng@apple.com>2006-03-26 09:50:58 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-03-26 09:50:58 +0000
commit4a147842eb24a7611fcd7bfb37c55185b4664927 (patch)
tree6a9ade75e951d1b02b30a02c8edbcbcd5022dd56 /include/llvm/CodeGen/SelectionDAGNodes.h
parent10d7fa62fffbceed580c34a00bd30f16643f6607 (diff)
Add ISD::isBuildVectorAllZeros predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27147 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/SelectionDAGNodes.h')
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index df76524ca1..4863940de2 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -458,7 +458,10 @@ namespace ISD {
/// isBuildVectorAllOnesInteger - Return true if the specified node is a
/// BUILD_VECTOR where all of the elements are ~0 or undef.
bool isBuildVectorAllOnesInteger(const SDNode *N);
-
+
+ /// isBuildVectorAllZeros - Return true if the specified node is a
+ /// BUILD_VECTOR where all of the elements are 0 or undef.
+ bool isBuildVectorAllZeros(const SDNode *N);
//===--------------------------------------------------------------------===//
/// ISD::CondCode enum - These are ordered carefully to make the bitfields