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authorChris Lattner <sabre@nondot.org>2004-02-29 05:06:49 +0000
committerChris Lattner <sabre@nondot.org>2004-02-29 05:06:49 +0000
commit6a8a9b4413cd595c8322e7ebb7d42cbb04ca6933 (patch)
tree33d0dd0032c6c2dcc63d8e68a4cb2d961d857cb8 /include/llvm/CodeGen/MachineInstrBuilder.h
parentc3c106ca59e44032041414c72ce584451f1d885f (diff)
Continue Alkis's int64_t cleanup. This makes all of the immediate related
methods take an int or unsigned value instead of int64_t. Also, add an 'addImm' method to the MachineInstrBuilder class, because the fact that the hardware sign or zero extends it does not/should not matter to the code generator. Once the old sparc backend is removed the difference can be eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11976 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstrBuilder.h')
-rw-r--r--include/llvm/CodeGen/MachineInstrBuilder.h16
1 files changed, 11 insertions, 5 deletions
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 9f0667867a..4d63d99e45 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -80,23 +80,29 @@ public:
/// addMReg - Add a machine register operand...
///
- const MachineInstrBuilder &addMReg(
- int Reg,
- MachineOperand::UseType Ty = MachineOperand::Use) const {
+ const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
+ = MachineOperand::Use) const {
MI->addMachineRegOperand(Reg, Ty);
return *this;
}
+
+ /// addImm - Add a new immediate operand.
+ ///
+ const MachineInstrBuilder &addImm(int Val) const {
+ MI->addZeroExtImmOperand(Val);
+ return *this;
+ }
/// addSImm - Add a new sign extended immediate operand...
///
- const MachineInstrBuilder &addSImm(int64_t val) const {
+ const MachineInstrBuilder &addSImm(int val) const {
MI->addSignExtImmOperand(val);
return *this;
}
/// addZImm - Add a new zero extended immediate operand...
///
- const MachineInstrBuilder &addZImm(int64_t Val) const {
+ const MachineInstrBuilder &addZImm(unsigned Val) const {
MI->addZeroExtImmOperand(Val);
return *this;
}