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author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-04 22:17:40 +0000 |
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committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-04 22:17:40 +0000 |
commit | 14be64018fb38d1fa535b9cd12d11371f4eba3b5 (patch) | |
tree | 2c3d0a9d629d6c3998e976920255848c298d4d42 /include/llvm/CodeGen/MachineInstrBuilder.h | |
parent | a33ceaa2d46f6bf50c979e28581d9e4941b45d44 (diff) |
Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstrBuilder.h')
-rw-r--r-- | include/llvm/CodeGen/MachineInstrBuilder.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h index 67255214a2..e0f9736100 100644 --- a/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/include/llvm/CodeGen/MachineInstrBuilder.h @@ -138,9 +138,10 @@ inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) { /// calls that are expected, it does not include the destination register. /// inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands, - unsigned DestReg) { + unsigned DestReg, + MOTy::UseType useType = MOTy::Def) { return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1, - true, true)).addReg(DestReg, MOTy::Def); + true, true)).addReg(DestReg, useType); } |