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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-10-15 16:22:44 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-10-15 16:22:44 +0000
commit21721b63c3b5a314dfa0be14823b10273860787c (patch)
treea494836fcdeaf850875d6e27faed700ccf65a2a5 /include/llvm/CodeGen/MachineInstr.h
parent1f4b6eb79f7c7119e635e56cfff1f8c3d0493a67 (diff)
fixed a coalscing bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@828 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstr.h')
-rw-r--r--include/llvm/CodeGen/MachineInstr.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 2c5a337b2c..c6633e5ca1 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -83,7 +83,7 @@ private:
int64_t immedVal; // constant value for an explicit constant
};
- unsigned regNum; // register number for an explicit register
+ int regNum; // register number for an explicit register
// will be set for a value after reg allocation
bool isDef; // is this a defition for the value
@@ -107,7 +107,7 @@ public:
}
inline unsigned int getMachineRegNum() const {
assert(opType == MO_MachineRegister);
- return regNum;
+ return (unsigned) regNum;
}
inline int64_t getImmedValue () const {
assert(opType >= MO_SignExtendedImmed || opType <= MO_PCRelativeDisp);
@@ -148,7 +148,7 @@ public:
// used to get the reg number if when one is allocted (must be
// called only after reg alloc)
- inline unsigned getAllocatedRegNum() const {
+ inline int getAllocatedRegNum() const {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
opType == MO_MachineRegister);
return regNum;
@@ -162,7 +162,7 @@ inline
MachineOperand::MachineOperand()
: opType(MO_VirtualRegister),
immedVal(0),
- regNum(0),
+ regNum(-1),
isDef(false)
{}
@@ -213,7 +213,7 @@ MachineOperand::InitializeReg(unsigned int _regNum)
{
opType = MO_MachineRegister;
value = NULL;
- regNum = _regNum;
+ regNum = (int) _regNum;
}