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| author | Chris Lattner <sabre@nondot.org> | 2006-01-04 07:12:21 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-01-04 07:12:21 +0000 |
| commit | 2adfa7e9320e79859beb556367ea607a329866b3 (patch) | |
| tree | 6ee76d41e456391ae4769fa93852018e2ed098e2 /include/llvm/CodeGen/MachineFunction.h | |
| parent | 4896c5db35e03e4374677e01fe0e2a28e4dd2605 (diff) | |
Add support for targets (like Alpha) that have terminator instructions which
use virtual registers. We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's. This fixes a problem on a testcase
Andrew sent me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25083 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineFunction.h')
0 files changed, 0 insertions, 0 deletions