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authorTom Stellard <thomas.stellard@amd.com>2012-07-16 14:17:16 +0000
committerTom Stellard <thomas.stellard@amd.com>2012-07-16 14:17:16 +0000
commita93c8a89c148a92a4234e0dcc76231b13bebc4e7 (patch)
tree3a112383211c40df133af718979553e53614bb09 /autoconf
parentc3c661d4c12978f3ca66626b35c6c656aa9a8478 (diff)
Build script changes for R600/SI Codegen v6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'autoconf')
-rw-r--r--autoconf/configure.ac5
1 files changed, 3 insertions, 2 deletions
diff --git a/autoconf/configure.ac b/autoconf/configure.ac
index 427c5413c6..d00a556a05 100644
--- a/autoconf/configure.ac
+++ b/autoconf/configure.ac
@@ -652,13 +652,13 @@ TARGETS_TO_BUILD=""
AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
[Build specific host targets: all or target1,target2,... Valid targets are:
host, x86, x86_64, sparc, powerpc, arm, mips, spu, hexagon,
- xcore, msp430, nvptx, and cpp (default=all)]),,
+ xcore, msp430, nvptx, r600, and cpp (default=all)]),,
enableval=all)
if test "$enableval" = host-only ; then
enableval=host
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 CppBackend MBlaze NVPTX Hexagon" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC ARM Mips CellSPU XCore MSP430 CppBackend MBlaze NVPTX Hexagon AMDGPU" ;;
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
case "$a_target" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -675,6 +675,7 @@ case "$enableval" in
hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
+ r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
host) case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;