diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-13 19:33:32 +0000 |
---|---|---|
committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-13 19:33:32 +0000 |
commit | e193b325837bee5f9a848a16077a6e156fe88fba (patch) | |
tree | d783c01e8e37709f836a876a1ca7f85d3a955ff4 | |
parent | 2bd7e532b49cb461f7e16acb01124b56aa169844 (diff) |
Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 12 | ||||
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.h | 5 | ||||
-rw-r--r-- | test/CodeGen/Mips/memcpy.ll | 19 |
3 files changed, 36 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index d6a8b8e365..aa777f7c2c 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -303,6 +303,8 @@ MipsTargetLowering(MipsTargetMachine &TM) setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); + + maxStoresPerMemcpy = 16; } bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { @@ -3455,6 +3457,16 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { return false; } +EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, + unsigned SrcAlign, bool IsZeroVal, + bool MemcpyStrSrc, + MachineFunction &MF) const { + if (Subtarget->hasMips64()) + return MVT::i64; + + return MVT::i32; +} + bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { if (VT != MVT::f32 && VT != MVT::f64) return false; diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index 740cf06406..e45d352b41 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -195,6 +195,11 @@ namespace llvm { virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + virtual EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, + unsigned SrcAlign, bool IsZeroVal, + bool MemcpyStrSrc, + MachineFunction &MF) const; + /// isFPImmLegal - Returns true if the target can instruction select the /// specified FP immediate natively. If false, the legalizer will /// materialize the FP immediate as a load from a constant pool. diff --git a/test/CodeGen/Mips/memcpy.ll b/test/CodeGen/Mips/memcpy.ll new file mode 100644 index 0000000000..39764a9363 --- /dev/null +++ b/test/CodeGen/Mips/memcpy.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel < %s | FileCheck %s + +%struct.S1 = type { i32, [41 x i8] } + +@.str = private unnamed_addr constant [31 x i8] c"abcdefghijklmnopqrstuvwxyzABCD\00", align 1 + +define void @foo1(%struct.S1* %s1, i8 signext %n) nounwind { +entry: +; CHECK-NOT: call16(memcpy + + %arraydecay = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 0 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %arraydecay, i8* getelementptr inbounds ([31 x i8]* @.str, i32 0, i32 0), i32 31, i32 1, i1 false) + %arrayidx = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 40 + store i8 %n, i8* %arrayidx, align 1 + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + |