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authorJim Grosbach <grosbach@apple.com>2011-07-26 17:44:46 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-26 17:44:46 +0000
commitdfdf02dbada1ff9f87fe6efef0fc182a754f13f7 (patch)
tree5442c08235050005e15b8227b955eb88d85c7a0e
parent5116ff671f45d48594d11360e22991a7edb13862 (diff)
ARM fix for LDREX source register encoding.
rdar://9842203 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136102 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrFormats.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index 3c1ff6c7d0..23c306de77 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -418,11 +418,11 @@ class AIldrex<bits<2> opcod, dag oops, dag iops, InstrItinClass itin,
: I<oops, iops, AddrModeNone, 4, IndexModeNone, LdStExFrm, itin,
opc, asm, "", pattern> {
bits<4> Rt;
- bits<4> Rn;
+ bits<4> addr;
let Inst{27-23} = 0b00011;
let Inst{22-21} = opcod;
let Inst{20} = 1;
- let Inst{19-16} = Rn;
+ let Inst{19-16} = addr;
let Inst{15-12} = Rt;
let Inst{11-0} = 0b111110011111;
}