ChangeToRegister should clear IsImp bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31772 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 4 deletions

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 1152a68604..b967a1fcb3 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -275,13 +275,13 @@ public:
   /// ChangeToRegister - Replace this operand with a new register operand of
   /// the specified value.  If an operand is known to be an register already,
   /// the setReg method should be used.
-  void ChangeToRegister(unsigned Reg, bool isDef,
-                        bool isKill = false, bool isDead = false) {
+  void ChangeToRegister(unsigned Reg, bool isDef) {
     opType = MO_Register;
     contents.RegNo = Reg;
     IsDef = isDef;
-    IsKill = isKill;
-    IsDead = isDead;
+    IsImp = false;
+    IsKill = false;
+    IsDead = false;
   }
 
   friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);