diff options
author | Chris Lattner <sabre@nondot.org> | 2005-01-11 23:33:00 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2005-01-11 23:33:00 +0000 |
commit | dbba22fa2a4a7b7e62a3b35806ec817570fccb99 (patch) | |
tree | caf5b4067471ed662268d9a7fc6008006fdfddb1 | |
parent | 837caa722376d3f9539d3e44e39ce7cd5a62b733 (diff) |
Fold loads into sign/zero extends. instead of:
mov %AL, BYTE PTR [%EDX + l18_length_code]
movzx %EAX, %AL
Emit:
movzx %EAX, BYTE PTR [%EDX + l18_length_code]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19489 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86ISelPattern.cpp | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index c7919bdb5a..358a0380dd 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -1011,18 +1011,31 @@ unsigned ISel::SelectExpr(SDOperand N) { case ISD::ZERO_EXTEND: { int DestIs16 = N.getValueType() == MVT::i16; int SrcIs16 = N.getOperand(0).getValueType() == MVT::i16; - Tmp1 = SelectExpr(N.getOperand(0)); // FIXME: This hack is here for zero extension casts from bool to i8. This // would not be needed if bools were promoted by Legalize. if (N.getValueType() == MVT::i8) { + Tmp1 = SelectExpr(N.getOperand(0)); BuildMI(BB, X86::MOV8rr, 1, Result).addReg(Tmp1); return Result; } + if (isFoldableLoad(N.getOperand(0))) { + static const unsigned Opc[3] = { + X86::MOVZX32rm8, X86::MOVZX32rm16, X86::MOVZX16rm8 + }; + + X86AddressMode AM; + EmitFoldedLoad(N.getOperand(0), AM); + addFullAddress(BuildMI(BB, Opc[SrcIs16+DestIs16*2], 4, Result), AM); + + return Result; + } + static const unsigned Opc[3] = { X86::MOVZX32rr8, X86::MOVZX32rr16, X86::MOVZX16rr8 }; + Tmp1 = SelectExpr(N.getOperand(0)); BuildMI(BB, Opc[SrcIs16+DestIs16*2], 1, Result).addReg(Tmp1); return Result; } @@ -1034,6 +1047,17 @@ unsigned ISel::SelectExpr(SDOperand N) { assert(N.getOperand(0).getValueType() != MVT::i1 && "Sign extend from bool not implemented!"); + if (isFoldableLoad(N.getOperand(0))) { + static const unsigned Opc[3] = { + X86::MOVSX32rm8, X86::MOVSX32rm16, X86::MOVSX16rm8 + }; + + X86AddressMode AM; + EmitFoldedLoad(N.getOperand(0), AM); + addFullAddress(BuildMI(BB, Opc[SrcIs16+DestIs16*2], 4, Result), AM); + return Result; + } + static const unsigned Opc[3] = { X86::MOVSX32rr8, X86::MOVSX32rr16, X86::MOVSX16rr8 }; @@ -2164,7 +2188,6 @@ void ISel::Select(SDOperand N) { return; } } - //Opc = TabPtr[Opc]; } } } |