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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-10-06 16:53:32 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-10-06 16:53:32 +0000 |
| commit | d5613debf99ce918145e1204df702ed502f5ac84 (patch) | |
| tree | 9c83528f11eb43c76e1b8c4946733f7f3d245eb3 | |
| parent | 32fca00a23a9872c31999d054b4dd7c724276d9d (diff) | |
remove VAX compatibility instruction, we will never use this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23643 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.td | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index ea0776b9b9..f355a12f23 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -397,9 +397,7 @@ def CVTTS : FPForm<0x16, 0x5AC, "cvtts/su $RB,$RC">; //Convert T_floating to S_f //LDQ_L Mem 2B Load quadword locked //LDQ_U Mem 0B Load unaligned quadword //MB Mfc 18.4000 Memory barrier -//RC Mfc 18.E000 Read and clear //RPCC Mfc 18.C000 Read process cycle counter -//RS Mfc 18.F000 Read and set //STL_C Mem 2E Store longword conditional //STQ_C Mem 2F Store quadword conditional |