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authorEric Christopher <echristo@apple.com>2011-06-03 17:24:37 +0000
committerEric Christopher <echristo@apple.com>2011-06-03 17:24:37 +0000
commitcf714d44b89864cf92d9c73508154457d0c65d9c (patch)
tree13f5c9987b1634ba7e91041a430d7d7cdb3d2c82
parente0b42c02f0764ea9df9c17efffc7838203fb8f16 (diff)
Make the Uv constraint a memory operand. This doesn't solve the
addressing mode problem mentioned in r132559. Backend part of rdar://9037836 and part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132561 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp3
-rw-r--r--test/CodeGen/ARM/inlineasm3.ll8
2 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 574d4ec7b1..76d059919c 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -7265,6 +7265,9 @@ ARMTargetLowering::getConstraintType(const std::string &Constraint) const {
case 'l': return C_RegisterClass;
case 'w': return C_RegisterClass;
}
+ } else {
+ if (Constraint == "Uv")
+ return C_Memory;
}
return TargetLowering::getConstraintType(Constraint);
}
diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll
index fffb39aa0e..ff54d6d75a 100644
--- a/test/CodeGen/ARM/inlineasm3.ll
+++ b/test/CodeGen/ARM/inlineasm3.ll
@@ -33,3 +33,11 @@ entry:
%asmtmp31 = call %0 asm "vld1.u8 {$0}, [$1, :128]!\0A", "=w,=r,1"(<16 x i8>* undef) nounwind
unreachable
}
+
+; Radar 9037836 & 9119939
+
+define i32 @t3() nounwind {
+entry:
+tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind
+ret i32 0
+}