[MIPS] Skip masking loads and stores via thread pointer.

Register t8 is reserved for thread pointer, and it can not be changed.
Thus, the value it has can be trusted, it points to the safe data zone
and there is no need to guard it.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=2275
TEST= run smoke tests

Review URL: https://codereview.chromium.org/11883035

1 files changed, 12 insertions, 6 deletions

diff --git a/lib/Target/Mips/MipsNaClRewritePass.cpp b/lib/Target/Mips/MipsNaClRewritePass.cpp
index f675e5663a..1ef5632e09 100644
--- a/lib/Target/Mips/MipsNaClRewritePass.cpp
+++ b/lib/Target/Mips/MipsNaClRewritePass.cpp
@@ -209,9 +209,12 @@ bool IsDangerousLoad(const MachineInstr &MI, int *AddrIdx) {
     break;
   }
 
-  if (MI.getOperand(*AddrIdx).getReg() == Mips::SP) {
-    // The contents of SP do not require masking.
-    return false;
+  switch (MI.getOperand(*AddrIdx).getReg()) {
+    default: break;
+    // The contents of SP and thread pointer register do not require masking.
+    case Mips::SP:
+    case Mips::T8:
+      return false;
   }
 
   return true;
@@ -238,9 +241,12 @@ bool IsDangerousStore(const MachineInstr &MI, int *AddrIdx) {
     break;
   }
 
-  if (MI.getOperand(*AddrIdx).getReg() == Mips::SP) {
-    // The contents of SP do not require masking.
-    return false;
+  switch (MI.getOperand(*AddrIdx).getReg()) {
+    default: break;
+    // The contents of SP and thread pointer register do not require masking.
+    case Mips::SP:
+    case Mips::T8:
+      return false;
   }
 
   return true;