aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJim Laskey <jlaskey@mac.com>2006-07-21 21:15:20 +0000
committerJim Laskey <jlaskey@mac.com>2006-07-21 21:15:20 +0000
commitcd4317efcf334be10d9a98008a1445d6e12a7712 (patch)
tree82f4e6381dbe6669926e797094654c0f430ed18c
parent60f09928a0d22d5927ff0a40fe9163cf1ba1014a (diff)
Eliminate data relocations by using NULL instead of global empty list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29250 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp6
-rw-r--r--lib/CodeGen/LiveVariables.cpp16
-rw-r--r--lib/CodeGen/RegAllocLocal.cpp34
-rw-r--r--lib/CodeGen/RegAllocSimple.cpp14
-rw-r--r--lib/CodeGen/VirtRegMap.cpp10
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp7
6 files changed, 50 insertions, 37 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index fba04670f2..9e0d5d2325 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -639,8 +639,10 @@ void LiveIntervals::computeIntervals()
DEBUG(std::cerr << getInstructionIndex(mi) << "\t" << *mi);
// handle implicit defs
- for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
- handleRegisterDef(mbb, mi, *id);
+ if (tid.ImplicitDefs) {
+ for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
+ handleRegisterDef(mbb, mi, *id);
+ }
// handle explicit defs
for (int i = mi->getNumOperands() - 1; i >= 0; --i) {
diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index 5c7818d330..46a8012ae3 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -239,9 +239,11 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
NumOperandsToProcess = 1;
// Loop over implicit uses, using them.
- for (const unsigned *ImplicitUses = MID.ImplicitUses;
- *ImplicitUses; ++ImplicitUses)
- HandlePhysRegUse(*ImplicitUses, MI);
+ if (MID.ImplicitUses) {
+ for (const unsigned *ImplicitUses = MID.ImplicitUses;
+ *ImplicitUses; ++ImplicitUses)
+ HandlePhysRegUse(*ImplicitUses, MI);
+ }
// Process all explicit uses...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
@@ -257,9 +259,11 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
}
// Loop over implicit defs, defining them.
- for (const unsigned *ImplicitDefs = MID.ImplicitDefs;
- *ImplicitDefs; ++ImplicitDefs)
- HandlePhysRegDef(*ImplicitDefs, MI);
+ if (MID.ImplicitDefs) {
+ for (const unsigned *ImplicitDefs = MID.ImplicitDefs;
+ *ImplicitDefs; ++ImplicitDefs)
+ HandlePhysRegDef(*ImplicitDefs, MI);
+ }
// Process all explicit defs...
for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 97be06fe8e..763221ffbf 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -525,9 +525,11 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// Loop over the implicit uses, making sure that they are at the head of the
// use order list, so they don't get reallocated.
- for (const unsigned *ImplicitUses = TID.ImplicitUses;
- *ImplicitUses; ++ImplicitUses)
- MarkPhysRegRecentlyUsed(*ImplicitUses);
+ if (TID.ImplicitUses) {
+ for (const unsigned *ImplicitUses = TID.ImplicitUses;
+ *ImplicitUses; ++ImplicitUses)
+ MarkPhysRegRecentlyUsed(*ImplicitUses);
+ }
// Get the used operands into registers. This has the potential to spill
// incoming values if we are out of registers. Note that we completely
@@ -587,19 +589,21 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
}
// Loop over the implicit defs, spilling them as well.
- for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
- *ImplicitDefs; ++ImplicitDefs) {
- unsigned Reg = *ImplicitDefs;
- spillPhysReg(MBB, MI, Reg, true);
- PhysRegsUseOrder.push_back(Reg);
- PhysRegsUsed[Reg] = 0; // It is free and reserved now
- PhysRegsEverUsed[Reg] = true;
+ if (TID.ImplicitDefs) {
+ for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
+ *ImplicitDefs; ++ImplicitDefs) {
+ unsigned Reg = *ImplicitDefs;
+ spillPhysReg(MBB, MI, Reg, true);
+ PhysRegsUseOrder.push_back(Reg);
+ PhysRegsUsed[Reg] = 0; // It is free and reserved now
+ PhysRegsEverUsed[Reg] = true;
- for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
- *AliasSet; ++AliasSet) {
- PhysRegsUseOrder.push_back(*AliasSet);
- PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
- PhysRegsEverUsed[*AliasSet] = true;
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+ *AliasSet; ++AliasSet) {
+ PhysRegsUseOrder.push_back(*AliasSet);
+ PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
+ PhysRegsEverUsed[*AliasSet] = true;
+ }
}
}
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 5d94f0af85..c6faead658 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -166,12 +166,16 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
unsigned Opcode = MI->getOpcode();
const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
const unsigned *Regs;
- for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
- RegsUsed[*Regs] = true;
+ if (Desc.ImplicitUses) {
+ for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
+ RegsUsed[*Regs] = true;
+ }
- for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
- RegsUsed[*Regs] = true;
- PhysRegsEverUsed[*Regs] = true;
+ if (Desc.ImplicitDefs) {
+ for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
+ RegsUsed[*Regs] = true;
+ PhysRegsEverUsed[*Regs] = true;
+ }
}
// Loop over uses, move from memory into registers.
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 86fef3e432..bc56945bc8 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -671,10 +671,12 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
// Loop over all of the implicit defs, clearing them from our available
// sets.
- for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
- *ImpDef; ++ImpDef) {
- PhysRegsUsed[*ImpDef] = true;
- Spills.ClobberPhysReg(*ImpDef);
+ const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
+ if (ImpDef) {
+ for ( ; *ImpDef; ++ImpDef) {
+ PhysRegsUsed[*ImpDef] = true;
+ Spills.ClobberPhysReg(*ImpDef);
+ }
}
DEBUG(std::cerr << '\t' << MI);
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index de93792556..812e0215d1 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -97,9 +97,6 @@ void InstrInfoEmitter::run(std::ostream &OS) {
const std::string &TargetName = Target.getName();
Record *InstrInfo = Target.getInstructionSet();
- // Emit empty implicit uses and defs lists
- OS << "static const unsigned EmptyImpList[] = { 0 };\n";
-
// Keep track of all of the def lists we have emitted already.
std::map<std::vector<Record*>, unsigned> EmittedLists;
unsigned ListNumber = 0;
@@ -239,13 +236,13 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
// Emit the implicit uses and defs lists...
std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses");
if (UseList.empty())
- OS << "EmptyImpList, ";
+ OS << "NULL, ";
else
OS << "ImplicitList" << EmittedLists[UseList] << ", ";
std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
if (DefList.empty())
- OS << "EmptyImpList, ";
+ OS << "NULL, ";
else
OS << "ImplicitList" << EmittedLists[DefList] << ", ";