diff options
| author | Dale Johannesen <dalej@apple.com> | 2008-11-12 02:00:35 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-11-12 02:00:35 +0000 |
| commit | cbf7cf50ecc4730563fdbbd8d03269839b445f56 (patch) | |
| tree | 3b3312466c3953d45f7950b5e7f19641b70590f2 | |
| parent | 580c0dfaed1caaf241dfb8c02c11f89d6431ee50 (diff) | |
Fix the testb optimization so x86 also bootstraps.
Reenable test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59101 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-11-06-testb.ll | 1 |
2 files changed, 1 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index e125ff3f26..62a6df3259 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1353,7 +1353,6 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } } -#if 0 // If the LHS is '(and load, const)', the RHS is 0, // the test is for equality or unsigned, and all 1 bits of the const are // in the same partial word, see if we can shorten the load. @@ -1380,7 +1379,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, bestOffset = (origWidth/width - offset - 1) * (width/8); else bestOffset = (uint64_t)offset * (width/8); - bestMask = Mask >> (offset * 8); + bestMask = Mask >> (offset * (width/8) * 8); bestWidth = width; break; } @@ -1407,7 +1406,6 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } } } -#endif // If the LHS is a ZERO_EXTEND, perform the comparison on the input. if (N0.getOpcode() == ISD::ZERO_EXTEND) { diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll index 53f86b390c..7acc7cad3c 100644 --- a/test/CodeGen/X86/2008-11-06-testb.ll +++ b/test/CodeGen/X86/2008-11-06-testb.ll @@ -1,5 +1,4 @@ ; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep testb -; XFAIL: * ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" |