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authorTom Stellard <thomas.stellard@amd.com>2013-01-31 22:11:53 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-01-31 22:11:53 +0000
commitcacbcb0f2c60d45618dee0e10ded2ed2052166a6 (patch)
tree67b4f9219a585ea11f82db3c03f869609e25e918
parent44ddc362542e2530e51f3269dcb3e0b82362acea (diff)
R600: Consider bitcast when folding const_address node.
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174098 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/R600/AMDILISelDAGToDAG.cpp3
-rw-r--r--lib/Target/R600/R600ISelLowering.cpp8
2 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp b/lib/Target/R600/AMDILISelDAGToDAG.cpp
index 567b3e26cf..ece26efcee 100644
--- a/lib/Target/R600/AMDILISelDAGToDAG.cpp
+++ b/lib/Target/R600/AMDILISelDAGToDAG.cpp
@@ -318,6 +318,9 @@ bool AMDGPUDAGToDAGISel::FoldOperands(unsigned Opcode,
}
}
break;
+ case ISD::BITCAST:
+ Ops[OperandIdx[i] - 1] = Operand.getOperand(0);
+ return true;
default:
break;
}
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
index 3dc5b0076e..ff18a44424 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -991,6 +991,14 @@ SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,
return Arg->getOperand(Element);
}
}
+ if (Arg.getOpcode() == ISD::BITCAST &&
+ Arg.getOperand(0).getOpcode() == ISD::BUILD_VECTOR) {
+ if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
+ unsigned Element = Const->getZExtValue();
+ return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getVTList(),
+ Arg->getOperand(0).getOperand(Element));
+ }
+ }
}
}
return SDValue();