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authorChris Lattner <sabre@nondot.org>2010-09-30 16:42:53 +0000
committerChris Lattner <sabre@nondot.org>2010-09-30 16:42:53 +0000
commit9ee4aed3b652ea4a4327af2cb1c614dd10cd8b47 (patch)
treea9f489077914be3d46211b9f2a5ab5ef01d25b29
parentb5a3ec17a4600b0e99bd0f4578e7639cfe46ba5a (diff)
implement support for finit, PR8258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115156 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp4
-rw-r--r--test/MC/AsmParser/X86/x86_instructions.s10
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index e028d41ea8..dc86484bd4 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1119,7 +1119,8 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
- if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw") {
+ if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" ||
+ Op->getToken() == "finit") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
@@ -1129,6 +1130,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
StringSwitch<const char*>(Op->getToken())
.Case("fstsw", "fnstsw")
.Case("fstcw", "fnstcw")
+ .Case("finit", "fninit")
.Default(0);
assert(Repl && "Unknown wait-prefixed instruction");
Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index b2ac5ad456..4731a0857d 100644
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -421,6 +421,16 @@ fstcw (%rsp)
// CHECK: wait
// CHECK: fnstcw (%rsp)
+// PR8259
+fstcw (%rsp)
+// CHECK: wait
+// CHECK: fnstcw (%rsp)
+
+// PR8258
+finit
+// CHECK: wait
+// CHECK: fninit
+
// rdar://8456382 - cvtsd2si support.
cvtsd2si %xmm1, %rax