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authorAkira Hatanaka <ahatanak@gmail.com>2011-09-24 01:34:44 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-09-24 01:34:44 +0000
commit95934844e3614adf949b09085be21f41ea4218ce (patch)
tree92430d9b76dee2f27ea3a4c023728ac172824be8
parent51f0c7641983469cbd29f8862a121645471a885a (diff)
Preparation for adding simple Mips64 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--.gitignore2
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp5
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td1
3 files changed, 8 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore
index 5dae434298..7677716035 100644
--- a/.gitignore
+++ b/.gitignore
@@ -17,11 +17,13 @@
*.pyc
# vim swap files
.*.swp
+*.patch
#==============================================================================#
# Explicit files to ignore (only matches one).
#==============================================================================#
.gitusers
+.svn
autom4te.cache
cscope.files
cscope.out
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 0c0b9abdd3..77650c7ef0 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -95,6 +95,9 @@ MipsTargetLowering(MipsTargetMachine &TM)
addRegisterClass(MVT::i32, Mips::CPURegsRegisterClass);
addRegisterClass(MVT::f32, Mips::FGR32RegisterClass);
+ if (HasMips64)
+ addRegisterClass(MVT::i64, Mips::CPU64RegsRegisterClass);
+
// When dealing with single precision only, use libcalls
if (!Subtarget->isSingleFloat()) {
if (HasMips64)
@@ -2260,6 +2263,8 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
if (RegVT == MVT::i32)
RC = Mips::CPURegsRegisterClass;
+ else if (RegVT == MVT::i64)
+ RC = Mips::CPU64RegsRegisterClass;
else if (RegVT == MVT::f32)
RC = Mips::FGR32RegisterClass;
else if (RegVT == MVT::f64) {
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index 101a7ceb78..454b636dd2 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -879,4 +879,5 @@ def : Pat<(MipsDynAlloc addr:$f), (DynAlloc addr:$f)>;
//===----------------------------------------------------------------------===//
include "MipsInstrFPU.td"
+include "Mips64InstrInfo.td"