aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKarl Schimpf <kschimpf@google.com>2013-09-18 10:13:42 -0700
committerKarl Schimpf <kschimpf@google.com>2013-09-18 10:13:42 -0700
commit72f158730cf2073e23e8f2795192a6d6f08140df (patch)
treee9d0a18df4b4455d7d836654d65b7aa7766689e4
parentde60bbfea3de2565a2f696810befece301507494 (diff)
Only allow PNaCl version 2 bitcode files.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3590 R=jvoung@chromium.org Review URL: https://codereview.chromium.org/23503071
-rw-r--r--lib/Bitcode/NaCl/Reader/NaClBitcodeHeader.cpp2
-rw-r--r--test/NaCl/Bitcode/bitcast-elide.ll114
-rw-r--r--test/NaCl/Bitcode/call-elide.ll134
-rw-r--r--test/NaCl/Bitcode/forward-ref-pointer-intrinsic.ll17
-rw-r--r--test/NaCl/Bitcode/globalvars.ll6
-rw-r--r--test/NaCl/Bitcode/intrinsic-pointer-args.ll6
-rw-r--r--test/NaCl/Bitcode/inttoptr-elide.ll99
-rw-r--r--test/NaCl/Bitcode/no-structs.ll17
-rw-r--r--test/NaCl/Bitcode/null.ll11
-rw-r--r--test/NaCl/Bitcode/ptrtoint-elide.ll492
-rw-r--r--test/NaCl/Bitcode/switch.ll14
11 files changed, 20 insertions, 892 deletions
diff --git a/lib/Bitcode/NaCl/Reader/NaClBitcodeHeader.cpp b/lib/Bitcode/NaCl/Reader/NaClBitcodeHeader.cpp
index dfab1bb10e..f058e256ee 100644
--- a/lib/Bitcode/NaCl/Reader/NaClBitcodeHeader.cpp
+++ b/lib/Bitcode/NaCl/Reader/NaClBitcodeHeader.cpp
@@ -254,7 +254,7 @@ void NaClBitcodeHeader::InstallFields() {
if (NaClBitcodeHeaderField *Version = GetPNaClVersionPtr(this)) {
PNaClVersion = Version->GetUInt32Value();
}
- if (PNaClVersion > 2) {
+ if (PNaClVersion != 2) {
IsSupportedFlag = false;
IsReadableFlag = false;
UpdatedUnsupportedMessage = true;
diff --git a/test/NaCl/Bitcode/bitcast-elide.ll b/test/NaCl/Bitcode/bitcast-elide.ll
index bc1edb7bf5..8b63606392 100644
--- a/test/NaCl/Bitcode/bitcast-elide.ll
+++ b/test/NaCl/Bitcode/bitcast-elide.ll
@@ -1,17 +1,10 @@
; Test how we handle eliding (pointer) bitcast instructions.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD2
; ------------------------------------------------------
@@ -27,19 +20,6 @@ define void @SimpleLoad() {
ret void
}
-; TD1: define void @SimpleLoad() {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @SimpleLoad() {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -62,21 +42,6 @@ define void @SimpleLoadAlloca() {
ret void
}
-; TD1: define void @SimpleLoadAlloca() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 4
-; TD1-NEXT: %2 = bitcast i8* %1 to i32*
-; TD1-NEXT: %3 = load i32* %2, align 4
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=3/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @SimpleLoadAlloca() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 4
; TD2-NEXT: %2 = bitcast i8* %1 to i32*
@@ -103,25 +68,6 @@ define i32 @TwoLoads(i32 %i) {
ret i32 %5
}
-; TD1: define i32 @TwoLoads(i32 %i) {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %4 = load i32* %3, align 4
-; TD1-NEXT: %5 = add i32 %2, %4
-; TD1-NEXT: ret i32 %5
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=2 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_CAST op0=4 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=3 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoads(i32 %i) {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -150,23 +96,6 @@ define i32 @TwoLoadOptOneBlock(i32 %i) {
ret i32 %4
}
-; TD1: define i32 @TwoLoadOptOneBlock(i32 %i) {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = load i32* %1, align 4
-; TD1-NEXT: %4 = add i32 %2, %3
-; TD1-NEXT: ret i32 %4
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=2 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=2 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoadOptOneBlock(i32 %i) {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -201,32 +130,6 @@ BB:
ret i32 %4
}
-; TD1: define i32 @TwoLoadOptTwoBlocks(i32 %i) {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = load i32* %1, align 4
-; TD1-NEXT: %4 = add i32 %2, %3
-; TD1-NEXT: br label %BB
-; TD1: BB:
-; TD1-NEXT: %5 = load i32* %1, align 4
-; TD1-NEXT: %6 = load i32* %1, align 4
-; TD1-NEXT: %7 = add i32 %5, %6
-; TD1-NEXT: ret i32 %4
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=2/>
-; PF1-NEXT: <INST_CAST op0=2 op1=1 op2=11/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=2 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_BR op0=1/>
-; PF1-NEXT: <INST_LOAD op0=4 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=5 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=4/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoadOptTwoBlocks(i32 %i) {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -262,19 +165,6 @@ define void @SimpleStore(i32 %i) {
ret void
}
-; TD1: define void @SimpleStore(i32 %i) {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: store i32 %i, i32* %1, align 4
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=2 op1=1 op2=11/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=3 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @SimpleStore(i32 %i) {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i32*
; TD2-NEXT: store i32 %i, i32* %1, align 4
diff --git a/test/NaCl/Bitcode/call-elide.ll b/test/NaCl/Bitcode/call-elide.ll
index 4ddc235f7b..2f7d18d0ec 100644
--- a/test/NaCl/Bitcode/call-elide.ll
+++ b/test/NaCl/Bitcode/call-elide.ll
@@ -1,17 +1,10 @@
; Test how we handle eliding pointers in call instructions.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD2
; ------------------------------------------------------
@@ -30,17 +23,6 @@ define void @DirectCall() {
ret void
}
-; TD1: define void @DirectCall() {
-; TD1-NEXT: call void @foo(i32 0)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_CALL op0=0 op1=14 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @DirectCall() {
; TD2-NEXT: call void @foo(i32 0)
; TD2-NEXT: ret void
@@ -62,19 +44,6 @@ define void @DirectCallIntToPtrArg(i32 %i) {
ret void
}
-; TD1: define void @DirectCallIntToPtrArg(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i8*
-; TD1-NEXT: %2 = call i32 @llvm.nacl.setjmp(i8* %1)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=10/>
-; PF1-NEXT: <INST_CALL op0=0 op1=14 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @DirectCallIntToPtrArg(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i8*
; TD2-NEXT: %2 = call i32 @llvm.nacl.setjmp(i8* %1)
@@ -98,21 +67,6 @@ define void @DirectCallPtrToIntArg() {
ret void
}
-; TD1: define void @DirectCallPtrToIntArg() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: call void @foo(i32 %2)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1=0 op2=9/>
-; PF1-NEXT: <INST_CALL op0=0 op1=16 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @DirectCallPtrToIntArg() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -136,19 +90,6 @@ define void @DirectCallBitcastArg(i32 %i) {
ret void
}
-; TD1: define void @DirectCallBitcastArg(i32 %i) {
-; TD1-NEXT: %1 = bitcast [4 x i8]* @bytes to i8*
-; TD1-NEXT: %2 = call i32 @llvm.nacl.setjmp(i8* %1)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_CALL op0=0 op1=14 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @DirectCallBitcastArg(i32 %i) {
; TD2-NEXT: %1 = bitcast [4 x i8]* @bytes to i8*
; TD2-NEXT: %2 = call i32 @llvm.nacl.setjmp(i8* %1)
@@ -170,19 +111,6 @@ define void @DirectCallScalarArg() {
ret void
}
-; TD1: define void @DirectCallScalarArg() {
-; TD1-NEXT: %1 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: call void @foo(i32 %1)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=0 op2=9/>
-; PF1-NEXT: <INST_CALL op0=0 op1=14 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @DirectCallScalarArg() {
; TD2-NEXT: %1 = ptrtoint [4 x i8]* @bytes to i32
; TD2-NEXT: call void @foo(i32 %1)
@@ -204,19 +132,6 @@ define void @IndirectCall(i32 %i) {
ret void
}
-; TD1: define void @IndirectCall(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to void (i32)*
-; TD1-NEXT: call void %1(i32 %i)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=3 op2=10/>
-; PF1-NEXT: <INST_CALL op0=0 op1=1 op2=2/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @IndirectCall(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to void (i32)*
; TD2-NEXT: call void %1(i32 %i)
@@ -240,23 +155,6 @@ define void @IndirectCallPtrToIntArg(i32 %i) {
ret void
}
-; TD1: define void @IndirectCallPtrToIntArg(i32 %i) {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = inttoptr i32 %i to void (i32)*
-; TD1-NEXT: %3 = ptrtoint i8* %1 to i32
-; TD1-NEXT: call void %2(i32 %3)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=3 op1=3 op2=10/>
-; PF1-NEXT: <INST_CAST op0=2 op1=0 op2=9/>
-; PF1-NEXT: <INST_CALL op0=0 op1=2 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @IndirectCallPtrToIntArg(i32 %i) {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -282,21 +180,6 @@ define void @IndirectCallScalarArg(i32 %i) {
ret void
}
-; TD1: define void @IndirectCallScalarArg(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to void (i32)*
-; TD1-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: call void %1(i32 %2)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=3 op2=10/>
-; PF1-NEXT: <INST_CAST op0=3 op1=0 op2=9/>
-; PF1-NEXT: <INST_CALL op0=0 op1=2 op2=1/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @IndirectCallScalarArg(i32 %i) {
; TD2-NEXT: %1 = ptrtoint [4 x i8]* @bytes to i32
; TD2-NEXT: %2 = inttoptr i32 %i to void (i32)*
@@ -322,19 +205,6 @@ define i32 @ReturnPtrIntrinsic() {
ret i32 %2
}
-; TD1: define i32 @ReturnPtrIntrinsic() {
-; TD1-NEXT: %1 = call i8* @llvm.nacl.read.tp()
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: ret i32 %2
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CALL op0=0 op1=3/>
-; PF1-NEXT: <INST_CAST op0=1 op1=0 op2=9/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define i32 @ReturnPtrIntrinsic() {
; TD2-NEXT: %1 = call i8* @llvm.nacl.read.tp()
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
diff --git a/test/NaCl/Bitcode/forward-ref-pointer-intrinsic.ll b/test/NaCl/Bitcode/forward-ref-pointer-intrinsic.ll
index b6f8124a6f..0ddfdd4b51 100644
--- a/test/NaCl/Bitcode/forward-ref-pointer-intrinsic.ll
+++ b/test/NaCl/Bitcode/forward-ref-pointer-intrinsic.ll
@@ -1,12 +1,8 @@
; Test forward reference of a pointer-typed intrinsic result.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD2
-
declare i8* @llvm.nacl.read.tp()
define i32 @forward_ref() {
@@ -22,17 +18,6 @@ block1:
br label %block2
}
-; TD1: define i32 @forward_ref() {
-; TD1-NEXT: br label %block1
-; TD1: block2:
-; TD1-NEXT: %1 = load i8* %3
-; TD1-NEXT: %2 = ptrtoint i8* %3 to i32
-; TD1-NEXT: ret i32 %2
-; TD1: block1:
-; TD1-NEXT: %3 = call i8* @llvm.nacl.read.tp()
-; TD1-NEXT: br label %block2
-; TD1-NEXT: }
-
; TD2: define i32 @forward_ref() {
; TD2-NEXT: br label %block1
; TD2: block2:
diff --git a/test/NaCl/Bitcode/globalvars.ll b/test/NaCl/Bitcode/globalvars.ll
index 811123dd0e..3bd9890aa8 100644
--- a/test/NaCl/Bitcode/globalvars.ll
+++ b/test/NaCl/Bitcode/globalvars.ll
@@ -4,17 +4,17 @@
; Test that we generate appropriate bitcode values for global variables.
-; Make sure that no struct/array types are generated by the global variables.
+; Make sure that no struct/array/pointer types are generated by the
+; global variables.
; BC: <TYPE_BLOCK_ID
; BC-NEXT: <NUMENTRY
; BC-NEXT: <VOID/>
; BC-NEXT: <FUNCTION
-; BC-NEXT: <POINTER
; BC-NEXT: </TYPE_BLOCK_ID>
; Make sure that the function declaration for function func (below)
; appears before the global variables block.
-; BC: <FUNCTION op0=2 op1=0 op2=0 op3=0/>
+; BC: <FUNCTION op0=1 op1=0 op2=0 op3=0/>
; Make sure we begin the globals block after function declarations.
; BC-NEXT: <GLOBALVAR_BLOCK
diff --git a/test/NaCl/Bitcode/intrinsic-pointer-args.ll b/test/NaCl/Bitcode/intrinsic-pointer-args.ll
index 7e5467c9a1..16b91e80f9 100644
--- a/test/NaCl/Bitcode/intrinsic-pointer-args.ll
+++ b/test/NaCl/Bitcode/intrinsic-pointer-args.ll
@@ -1,12 +1,8 @@
; Test that intrinsic declarations are read back correctly.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD
-
-
declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*)
diff --git a/test/NaCl/Bitcode/inttoptr-elide.ll b/test/NaCl/Bitcode/inttoptr-elide.ll
index 40859ed9a6..9d683cf202 100644
--- a/test/NaCl/Bitcode/inttoptr-elide.ll
+++ b/test/NaCl/Bitcode/inttoptr-elide.ll
@@ -1,17 +1,10 @@
; Test how we handle eliding inttoptr instructions.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD2
; ------------------------------------------------------
@@ -23,19 +16,6 @@ define void @SimpleLoad(i32 %i) {
ret void
}
-; TD1: define void @SimpleLoad(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=10/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @SimpleLoad(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -60,25 +40,6 @@ define i32 @TwoLoads(i32 %i) {
ret i32 %5
}
-; TD1: define i32 @TwoLoads(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = inttoptr i32 %i to i32*
-; TD1-NEXT: %4 = load i32* %3, align 4
-; TD1-NEXT: %5 = add i32 %2, %4
-; TD1-NEXT: ret i32 %5
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=10/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_CAST op0=3 op1=1 op2=10/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=3 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoads(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -107,23 +68,6 @@ define i32 @TwoLoadOptOneBlock(i32 %i) {
ret i32 %4
}
-; TD1: define i32 @TwoLoadOptOneBlock(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = load i32* %1, align 4
-; TD1-NEXT: %4 = add i32 %2, %3
-; TD1-NEXT: ret i32 %4
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=10/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=2 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoadOptOneBlock(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -158,32 +102,6 @@ BB:
ret i32 %7
}
-; TD1: define i32 @TwoLoadOptTwoBlocks(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i32*
-; TD1-NEXT: %2 = load i32* %1, align 4
-; TD1-NEXT: %3 = load i32* %1, align 4
-; TD1-NEXT: %4 = add i32 %2, %3
-; TD1-NEXT: br label %BB
-; TD1: BB:
-; TD1-NEXT: %5 = load i32* %1, align 4
-; TD1-NEXT: %6 = load i32* %1, align 4
-; TD1-NEXT: %7 = add i32 %5, %6
-; TD1-NEXT: ret i32 %7
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=2/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=10/>
-; PF1-NEXT: <INST_LOAD op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=2 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_BR op0=1/>
-; PF1-NEXT: <INST_LOAD op0=4 op1=3 op2=0/>
-; PF1-NEXT: <INST_LOAD op0=5 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_RET op0=1/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define i32 @TwoLoadOptTwoBlocks(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i32*
; TD2-NEXT: %2 = load i32* %1, align 4
@@ -219,19 +137,6 @@ define void @SimpleStore(i32 %i) {
ret void
}
-; TD1: define void @SimpleStore(i32 %i) {
-; TD1-NEXT: %1 = inttoptr i32 %i to i32*
-; TD1-NEXT: store i32 %i, i32* %1, align 4
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1-NEXT: <DECLAREBLOCKS op0=1/>
-; PF1-NEXT: <INST_CAST op0=1 op1=1 op2=10/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=3 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @SimpleStore(i32 %i) {
; TD2-NEXT: %1 = inttoptr i32 %i to i32*
; TD2-NEXT: store i32 %i, i32* %1, align 4
diff --git a/test/NaCl/Bitcode/no-structs.ll b/test/NaCl/Bitcode/no-structs.ll
index 6ca17c0634..289cc119fb 100644
--- a/test/NaCl/Bitcode/no-structs.ll
+++ b/test/NaCl/Bitcode/no-structs.ll
@@ -1,11 +1,7 @@
; Tests that even though global variables can define structured types,
; they types are not put into the bitcode file.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
@@ -26,16 +22,7 @@ define void @CheckPtrToIntGlobal() {
ret void
}
-; Note that neither pnacl-version defines a struct type.
-
-; PF1: <TYPE_BLOCK_ID>
-; PF1-NEXT: <NUMENTRY op0=5/>
-; PF1-NEXT: <INTEGER op0=32/>
-; PF1-NEXT: <VOID/>
-; PF1-NEXT: <FUNCTION op0=0 op1=1/>
-; PF1-NEXT: <POINTER op0=2 op1=0/>
-; PF1-NEXT: <POINTER op0=0 op1=0/>
-; PF1-NEXT: </TYPE_BLOCK_ID>
+; Note that it doesn't define a struct type.
; PF2: <TYPE_BLOCK_ID>
; PF2-NEXT: <NUMENTRY op0=3/>
diff --git a/test/NaCl/Bitcode/null.ll b/test/NaCl/Bitcode/null.ll
index 9e5de493b3..866c2017bf 100644
--- a/test/NaCl/Bitcode/null.ll
+++ b/test/NaCl/Bitcode/null.ll
@@ -1,17 +1,10 @@
; Test that we no longer generate NULL for numeric constants.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD
; ------------------------------------------------------
diff --git a/test/NaCl/Bitcode/ptrtoint-elide.ll b/test/NaCl/Bitcode/ptrtoint-elide.ll
index 5c95a79789..bf9ac25bcd 100644
--- a/test/NaCl/Bitcode/ptrtoint-elide.ll
+++ b/test/NaCl/Bitcode/ptrtoint-elide.ll
@@ -1,17 +1,10 @@
; Test how we handle eliding ptrtoint instructions.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 | pnacl-thaw \
-; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 | pnacl-thaw \
+; RUN: llvm-as < %s | pnacl-freeze | pnacl-thaw \
; RUN: | llvm-dis - | FileCheck %s -check-prefix=TD2
; ------------------------------------------------------
@@ -31,23 +24,6 @@ define void @AllocCastSimple() {
ret void
}
-; TD1: define void @AllocCastSimple() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: store i32 %2, i32* %3, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=4 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @AllocCastSimple() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -67,7 +43,7 @@ define void @AllocCastSimple() {
; Same as above, but with the cast order changed. Shows
; that we always inject casts back in a fixed order. Hence,
-; in PNaCl version 2, the casts will be reversed.
+; the casts will be reversed.
define void @AllocCastSimpleReversed() {
%1 = alloca i8, i32 4, align 8
%2 = bitcast [4 x i8]* @bytes to i32*
@@ -76,23 +52,6 @@ define void @AllocCastSimpleReversed() {
ret void
}
-; TD1: define void @AllocCastSimpleReversed() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %3 = ptrtoint i8* %1 to i32
-; TD1-NEXT: store i32 %3, i32* %2, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_STORE op0=2 op1=1 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @AllocCastSimpleReversed() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -119,23 +78,6 @@ define void @AllocCastDelete() {
ret void
}
-; TD1: define void @AllocCastDelete() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = alloca i8, i32 4, align 8
-; TD1-NEXT: %4 = ptrtoint i8* %3 to i32
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_ALLOCA op0=3 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @AllocCastDelete() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = alloca i8, i32 4, align 8
@@ -163,25 +105,6 @@ define void @AllocCastOpt() {
ret void
}
-; TD1: define void @AllocCastOpt() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %3 = ptrtoint i8* %1 to i32
-; TD1-NEXT: store i32 %3, i32* %2, align 1
-; TD1-NEXT: store i32 %3, i32* %2, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_STORE op0=2 op1=1 op2=1 op3=0/>
-; PF1-NEXT: <INST_STORE op0=2 op1=1 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @AllocCastOpt() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -212,25 +135,6 @@ define void @AllocCastMove(i32) {
ret void
}
-; TD1: define void @AllocCastMove(i32) {
-; TD1-NEXT: %2 = alloca i8, i32 4, align 8
-; TD1-NEXT: %3 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: %4 = ptrtoint i8* %2 to i32
-; TD1-NEXT: %5 = add i32 %0, 1
-; TD1-NEXT: store i32 %4, i32* %3, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=2 op1=4/>
-; PF1-NEXT: <INST_CAST op0=5 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=6 op1=4 op2=0/>
-; PF1-NEXT: <INST_STORE op0=3 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @AllocCastMove(i32) {
; TD2-NEXT: %2 = alloca i8, i32 4, align 8
; TD2-NEXT: %3 = add i32 %0, 1
@@ -260,23 +164,6 @@ define void @StoreGlobal() {
ret void
}
-; TD1: define void @StoreGlobal() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %3 = bitcast i8* %1 to i32*
-; TD1-NEXT: store i32 %2, i32* %3, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @StoreGlobal() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
@@ -303,23 +190,6 @@ define void @StoreGlobalCastsReversed() {
ret void
}
-; TD1: define void @StoreGlobalCastsReversed() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = bitcast i8* %1 to i32*
-; TD1-NEXT: %3 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: store i32 %3, i32* %2, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_CAST op0=4 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_STORE op0=2 op1=1 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @StoreGlobalCastsReversed() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
@@ -346,23 +216,6 @@ define i32 @StoreGlobalMovePtr2Int() {
ret i32 0
}
-; TD1: define i32 @StoreGlobalMovePtr2Int() {
-; TD1-NEXT: %1 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %2 = alloca i8, i32 4, align 8
-; TD1-NEXT: %3 = bitcast i8* %2 to i32*
-; TD1-NEXT: store i32 %1, i32* %3, align 1
-; TD1-NEXT: ret i32 0
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_ALLOCA op0=3 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_STORE op0=1 op1=3 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET op0=4/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define i32 @StoreGlobalMovePtr2Int() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
@@ -400,27 +253,6 @@ define void @CastAddAlloca() {
ret void
}
-; TD1: define void @CastAddAlloca() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = add i32 1, 2
-; TD1-NEXT: %4 = add i32 %2, 2
-; TD1-NEXT: %5 = add i32 1, %2
-; TD1-NEXT: %6 = add i32 %2, %2
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=5 op1=4 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=5 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=7 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=4 op1=4 op2=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @CastAddAlloca() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = add i32 1, 2
@@ -461,25 +293,6 @@ define void @CastAddGlobal() {
ret void
}
-; TD1: define void @CastAddGlobal() {
-; TD1-NEXT: %1 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %2 = add i32 1, 2
-; TD1-NEXT: %3 = add i32 %1, 2
-; TD1-NEXT: %4 = add i32 1, %1
-; TD1-NEXT: %5 = add i32 %1, %1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=3 op1=2 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=5 op1=3 op2=0/>
-; PF1-NEXT: <INST_BINOP op0=4 op1=4 op2=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @CastAddGlobal() {
; TD2-NEXT: %1 = add i32 1, 2
; TD2-NEXT: %2 = ptrtoint [4 x i8]* @bytes to i32
@@ -519,43 +332,6 @@ define void @CastBinop() {
ret void
}
-; TD1: define void @CastBinop() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %4 = sub i32 %2, %3
-; TD1-NEXT: %5 = mul i32 %2, %3
-; TD1-NEXT: %6 = udiv i32 %2, %3
-; TD1-NEXT: %7 = urem i32 %2, %3
-; TD1-NEXT: %8 = srem i32 %2, %3
-; TD1-NEXT: %9 = shl i32 %2, %3
-; TD1-NEXT: %10 = lshr i32 %2, %3
-; TD1-NEXT: %11 = ashr i32 %2, %3
-; TD1-NEXT: %12 = and i32 %2, %3
-; TD1-NEXT: %13 = or i32 %2, %3
-; TD1-NEXT: %14 = xor i32 %2, %3
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=4 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=1/>
-; PF1-NEXT: <INST_BINOP op0=3 op1=2 op2=2/>
-; PF1-NEXT: <INST_BINOP op0=4 op1=3 op2=3/>
-; PF1-NEXT: <INST_BINOP op0=5 op1=4 op2=5/>
-; PF1-NEXT: <INST_BINOP op0=6 op1=5 op2=6/>
-; PF1-NEXT: <INST_BINOP op0=7 op1=6 op2=7/>
-; PF1-NEXT: <INST_BINOP op0=8 op1=7 op2=8/>
-; PF1-NEXT: <INST_BINOP op0=9 op1=8 op2=9/>
-; PF1-NEXT: <INST_BINOP op0=10 op1=9 op2=10/>
-; PF1-NEXT: <INST_BINOP op0=11 op1=10 op2=11/>
-; PF1-NEXT: <INST_BINOP op0=12 op1=11 op2=12/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @CastBinop() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -616,39 +392,6 @@ define void @TestCasts() {
ret void
}
-; TD1: define void @TestCasts() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = trunc i32 257 to i8
-; TD1-NEXT: %4 = trunc i32 %2 to i8
-; TD1-NEXT: %5 = zext i32 257 to i64
-; TD1-NEXT: %6 = zext i32 %2 to i64
-; TD1-NEXT: %7 = sext i32 -1 to i64
-; TD1-NEXT: %8 = sext i32 %2 to i64
-; TD1-NEXT: %9 = uitofp i32 1 to float
-; TD1-NEXT: %10 = uitofp i32 %2 to float
-; TD1-NEXT: %11 = sitofp i32 -1 to float
-; TD1-NEXT: %12 = sitofp i32 %2 to float
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=2 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=6 op1={{.*}} op2=0/>
-; PF1-NEXT: <INST_CAST op0=2 op1={{.*}} op2=0/>
-; PF1-NEXT: <INST_CAST op0=8 op1={{.*}} op2=1/>
-; PF1-NEXT: <INST_CAST op0=4 op1={{.*}} op2=1/>
-; PF1-NEXT: <INST_CAST op0=9 op1={{.*}} op2=2/>
-; PF1-NEXT: <INST_CAST op0=6 op1={{.*}} op2=2/>
-; PF1-NEXT: <INST_CAST op0=9 op1={{.*}} op2=5/>
-; PF1-NEXT: <INST_CAST op0=8 op1={{.*}} op2=5/>
-; PF1-NEXT: <INST_CAST op0=13 op1={{.*}} op2=6/>
-; PF1-NEXT: <INST_CAST op0=10 op1={{.*}} op2=6/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @TestCasts() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = trunc i32 257 to i8
@@ -692,23 +435,6 @@ define void @TestSavedPtrToInt() {
ret void
}
-; TD1: define void @TestSavedPtrToInt() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = add i32 %2, 0
-; TD1-NEXT: %4 = call i32 @bar(i32 %2)
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=2 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=1 op1=3 op2=0/>
-; PF1-NEXT: <INST_CALL op0=0 op1=26 op2=2/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @TestSavedPtrToInt() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = ptrtoint i8* %1 to i32
@@ -740,31 +466,6 @@ define void @CastIcmp() {
ret void
}
-; TD1: define void @CastIcmp() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %4 = icmp eq i32 1, 2
-; TD1-NEXT: %5 = icmp eq i32 %2, 2
-; TD1-NEXT: %6 = icmp eq i32 1, %3
-; TD1-NEXT: %7 = icmp eq i32 %2, %3
-; TD1-NEXT: %8 = icmp eq i32 %3, %2
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=6 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CMP2 op0=6 op1=5 op2=32/>
-; PF1-NEXT: <INST_CMP2 op0=3 op1=6 op2=32/>
-; PF1-NEXT: <INST_CMP2 op0=8 op1=3 op2=32/>
-; PF1-NEXT: <INST_CMP2 op0=5 op1=4 op2=32/>
-; PF1-NEXT: <INST_CMP2 op0=5 op1=6 op2=32/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @CastIcmp() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = icmp eq i32 1, 2
@@ -803,31 +504,6 @@ define void @CastSelect() {
ret void
}
-; TD1: define void @CastSelect() {
-; TD1-NEXT: %1 = alloca i8, i32 4, align 8
-; TD1-NEXT: %2 = ptrtoint i8* %1 to i32
-; TD1-NEXT: %3 = ptrtoint [4 x i8]* @bytes to i32
-; TD1-NEXT: %4 = select i1 true, i32 1, i32 2
-; TD1-NEXT: %5 = select i1 true, i32 %2, i32 2
-; TD1-NEXT: %6 = select i1 true, i32 1, i32 %3
-; TD1-NEXT: %7 = select i1 true, i32 %2, i32 %3
-; TD1-NEXT: %8 = select i1 true, i32 %3, i32 %2
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=2 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=7 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_VSELECT op0=7 op1=6 op2=4/>
-; PF1-NEXT: <INST_VSELECT op0=3 op1=7 op2=5/>
-; PF1-NEXT: <INST_VSELECT op0=9 op1=3 op2=6/>
-; PF1-NEXT: <INST_VSELECT op0=5 op1=4 op2=7/>
-; PF1-NEXT: <INST_VSELECT op0=5 op1=6 op2=8/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: </FUNCTION_BLOCK>
-
; TD2: define void @CastSelect() {
; TD2-NEXT: %1 = alloca i8, i32 4, align 8
; TD2-NEXT: %2 = select i1 true, i32 1, i32 2
@@ -876,40 +552,6 @@ merge:
ret void
}
-; TD1: define void @PhiBackwardRefs(i1) {
-; TD1-NEXT: %2 = alloca i8, i32 4, align 8
-; TD1-NEXT: %3 = bitcast i8* %2 to i32*
-; TD1-NEXT: %4 = alloca i8, i32 4, align 8
-; TD1-NEXT: %5 = ptrtoint i8* %4 to i32
-; TD1-NEXT: br i1 %0, label %true, label %false
-; TD1: true:
-; TD1-NEXT: %6 = load i32* %3
-; TD1-NEXT: br label %merge
-; TD1: false:
-; TD1-NEXT: %7 = load i32* %3
-; TD1-NEXT: br label %merge
-; TD1: merge:
-; TD1-NEXT: %8 = phi i32 [ %5, %true ], [ %5, %false ]
-; TD1-NEXT: %9 = phi i32 [ %6, %true ], [ %7, %false ]
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_ALLOCA op0=3 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BR op0=1 op1=2 op2=6/>
-; PF1-NEXT: <INST_LOAD op0=3 op1=0 op2=0/>
-; PF1-NEXT: <INST_BR op0=3/>
-; PF1-NEXT: <INST_LOAD op0=4 op1=0 op2=0/>
-; PF1-NEXT: <INST_BR op0=3/>
-; PF1-NEXT: <INST_PHI op0=0 op1=6 op2=1 op3=6 op4=2/>
-; PF1-NEXT: <INST_PHI op0=0 op1=6 op2=1 op3=4 op4=2/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @PhiBackwardRefs(i1) {
; TD2-NEXT: %2 = alloca i8, i32 4, align 8
; TD2-NEXT: %3 = alloca i8, i32 4, align 8
@@ -972,47 +614,6 @@ start:
br i1 %0, label %true, label %false
}
-; TD1: define void @PhiForwardRefs(i1) {
-; TD1-NEXT: br label %start
-; TD1: merge:
-; TD1-NEXT: %2 = phi i32 [ %9, %true ], [ %9, %false ]
-; TD1-NEXT: %3 = phi i32 [ %4, %true ], [ %5, %false ]
-; TD1-NEXT: ret void
-; TD1: true:
-; TD1-NEXT: %4 = load i32* %7
-; TD1-NEXT: br label %merge
-; TD1: false:
-; TD1-NEXT: %5 = load i32* %7
-; TD1-NEXT: br label %merge
-; TD1: start:
-; TD1-NEXT: %6 = alloca i8, i32 4, align 8
-; TD1-NEXT: %7 = bitcast i8* %6 to i32*
-; TD1-NEXT: %8 = alloca i8, i32 4, align 8
-; TD1-NEXT: %9 = ptrtoint i8* %8 to i32
-; TD1-NEXT: br i1 %0, label %true, label %false
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_BR op0=4/>
-; PF1-NEXT: <FORWARDTYPEREF op0=30 op1=0/>
-; PF1-NEXT: <INST_PHI op0=0 op1=15 op2=2 op3=15 op4=3/>
-; PF1-NEXT: <FORWARDTYPEREF op0=25 op1=0/>
-; PF1-NEXT: <FORWARDTYPEREF op0=26 op1=0/>
-; PF1-NEXT: <INST_PHI op0=0 op1=3 op2=2 op3=5 op4=3/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: <FORWARDTYPEREF op0=28 op1=4/>
-; PF1-NEXT: <INST_LOAD op0=4294967293 op1=0 op2=0/>
-; PF1-NEXT: <INST_BR op0=1/>
-; PF1-NEXT: <INST_LOAD op0=4294967294 op1=0 op2=0/>
-; PF1-NEXT: <INST_BR op0=1/>
-; PF1-NEXT: <INST_ALLOCA op0=5 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_ALLOCA op0=7 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BR op0=2 op1=3 op2=10/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @PhiForwardRefs(i1) {
; TD2-NEXT: br label %start
; TD2: merge
@@ -1082,44 +683,6 @@ merge:
ret void
}
-; TD1: define void @PhiMergeCast(i1) {
-; TD1-NEXT: %2 = alloca i8, i32 4, align 8
-; TD1-NEXT: %3 = bitcast i8* %2 to i32*
-; TD1-NEXT: %4 = alloca i8, i32 4, align 8
-; TD1-NEXT: %5 = ptrtoint i8* %4 to i32
-; TD1-NEXT: br i1 %0, label %true, label %false
-; TD1: true:
-; TD1-NEXT: %6 = load i32* %3
-; TD1-NEXT: %7 = ptrtoint i8* %4 to i32
-; TD1-NEXT: %8 = add i32 %6, %7
-; TD1-NEXT: br label %merge
-; TD1: false:
-; TD1-NEXT: %9 = load i32* %3
-; TD1-NEXT: br label %merge
-; TD1: merge:
-; TD1-NEXT: %10 = phi i32 [ %5, %true ], [ %5, %false ]
-; TD1-NEXT: %11 = phi i32 [ %6, %true ], [ %9, %false ]
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_ALLOCA op0=3 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BR op0=1 op1=2 op2=6/>
-; PF1-NEXT: <INST_LOAD op0=3 op1=0 op2=0/>
-; PF1-NEXT: <INST_CAST op0=3 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_BINOP op0=2 op1=1 op2=0/>
-; PF1-NEXT: <INST_BR op0=3/>
-; PF1-NEXT: <INST_LOAD op0=6 op1=0 op2=0/>
-; PF1-NEXT: <INST_BR op0=3/>
-; PF1-NEXT: <INST_PHI op0=0 op1=10 op2=1 op3=10 op4=2/>
-; PF1-NEXT: <INST_PHI op0=0 op1=10 op2=1 op3=4 op4=2/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @PhiMergeCast(i1) {
; TD2-NEXT: %2 = alloca i8, i32 4, align 8
; TD2-NEXT: %3 = alloca i8, i32 4, align 8
@@ -1193,55 +756,6 @@ b4:
ret void
}
-; TD1: define void @LongReachingCasts(i1) {
-; TD1-NEXT: %2 = alloca i8, i32 4, align 8
-; TD1-NEXT: %3 = ptrtoint i8* %2 to i32
-; TD1-NEXT: %4 = bitcast [4 x i8]* @bytes to i32*
-; TD1-NEXT: br i1 %0, label %Split1, label %Split2
-; TD1: Split1:
-; TD1-NEXT: br i1 %0, label %b1, label %b2
-; TD1: Split2:
-; TD1-NEXT: br i1 %0, label %b3, label %b4
-; TD1: b1:
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: ret void
-; TD1: b2:
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: ret void
-; TD1: b3:
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: ret void
-; TD1: b4:
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: store i32 %3, i32* %4, align 1
-; TD1-NEXT: ret void
-; TD1-NEXT: }
-
-; PF1: <FUNCTION_BLOCK>
-; PF1: </CONSTANTS_BLOCK>
-; PF1-NEXT: <INST_ALLOCA op0=1 op1=4/>
-; PF1-NEXT: <INST_CAST op0=1 op1={{.*}} op2=9/>
-; PF1-NEXT: <INST_CAST op0=5 op1={{.*}} op2=11/>
-; PF1-NEXT: <INST_BR op0=1 op1=2 op2=5/>
-; PF1-NEXT: <INST_BR op0=3 op1=4 op2=5/>
-; PF1-NEXT: <INST_BR op0=5 op1=6 op2=5/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_STORE op0=1 op1=2 op2=1 op3=0/>
-; PF1-NEXT: <INST_RET/>
-; PF1: </FUNCTION_BLOCK>
-
; TD2: define void @LongReachingCasts(i1) {
; TD2-NEXT: %2 = alloca i8, i32 4, align 8
; TD2-NEXT: br i1 %0, label %Split1, label %Split2
diff --git a/test/NaCl/Bitcode/switch.ll b/test/NaCl/Bitcode/switch.ll
index 3fd5e68483..3d5ac91281 100644
--- a/test/NaCl/Bitcode/switch.ll
+++ b/test/NaCl/Bitcode/switch.ll
@@ -1,11 +1,7 @@
; Test that we no longer put VECTOR/ARRAY type entries, associated with
; switch instructions, into the bitcode file.
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=1 \
-; RUN: | pnacl-bcanalyzer -dump-records \
-; RUN: | FileCheck %s -check-prefix=PF1
-
-; RUN: llvm-as < %s | pnacl-freeze --pnacl-version=2 \
+; RUN: llvm-as < %s | pnacl-freeze \
; RUN: | pnacl-bcanalyzer -dump-records \
; RUN: | FileCheck %s -check-prefix=PF2
@@ -47,14 +43,6 @@ end:
ret void
}
-; PF1: <TYPE_BLOCK_ID>
-; PF1-NEXT: <NUMENTRY op0=4/>
-; PF1-NEXT: <VOID/>
-; PF1-NEXT: <INTEGER op0=32/>
-; PF1-NEXT: <FUNCTION op0={{.*}} op1={{.*}} op2={{.*}}/>
-; PF1-NEXT: <POINTER op0={{.*}} op1={{.*}}/>
-; PF1-NEXT: </TYPE_BLOCK_ID>
-
; PF2: <TYPE_BLOCK_ID>
; PF2-NEXT: <NUMENTRY op0=3/>
; PF2-NEXT: <VOID/>