Delete trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62307 91177308-0d34-0410-b5e6-96231b3b80d8

8 files changed, 420 insertions, 420 deletions

diff --git a/include/llvm/Support/Registry.h b/include/llvm/Support/Registry.h
index c9fb0a1d3e..5a7d7fa65e 100644
--- a/include/llvm/Support/Registry.h
+++ b/include/llvm/Support/Registry.h
@@ -8,7 +8,7 @@
 //===----------------------------------------------------------------------===//
 //
 // Defines a registry template for discovering pluggable modules.
-// 
+//
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_SUPPORT_REGISTRY_H
@@ -23,34 +23,34 @@ namespace llvm {
   class SimpleRegistryEntry {
     const char *Name, *Desc;
     T *(*Ctor)();
-    
+
   public:
     SimpleRegistryEntry(const char *N, const char *D, T *(*C)())
       : Name(N), Desc(D), Ctor(C)
     {}
-    
+
     const char *getName() const { return Name; }
     const char *getDesc() const { return Desc; }
     T *instantiate() const { return Ctor(); }
   };
-  
-  
+
+
   /// Traits for registry entries. If using other than SimpleRegistryEntry, it
   /// is necessary to define an alternate traits class.
   template <typename T>
   class RegistryTraits {
     RegistryTraits(); // Do not implement.
-    
+
   public:
     typedef SimpleRegistryEntry<T> entry;
-    
+
     /// nameof/descof - Accessors for name and description of entries. These are
     //                  used to generate help for command-line options.
     static const char *nameof(const entry &Entry) { return Entry.getName(); }
     static const char *descof(const entry &Entry) { return Entry.getDesc(); }
   };
-  
-  
+
+
   /// A global registry used in conjunction with static constructors to make
   /// pluggable components (like targets or garbage collectors) "just work" when
   /// linked with an executable.
@@ -59,37 +59,37 @@ namespace llvm {
   public:
     typedef U traits;
     typedef typename U::entry entry;
-    
+
     class node;
     class listener;
     class iterator;
-  
+
   private:
     Registry(); // Do not implement.
-    
+
     static void Announce(const entry &E) {
       for (listener *Cur = ListenerHead; Cur; Cur = Cur->Next)
         Cur->registered(E);
     }
-    
+
     friend class node;
     static node *Head, *Tail;
-    
+
     friend class listener;
     static listener *ListenerHead, *ListenerTail;
-    
+
   public:
     class iterator;
-    
-    
+
+
     /// Node in linked list of entries.
-    /// 
+    ///
     class node {
       friend class iterator;
-      
+
       node *Next;
       const entry& Val;
-      
+
     public:
       node(const entry& V) : Next(0), Val(V) {
         if (Tail)
@@ -97,63 +97,63 @@ namespace llvm {
         else
           Head = this;
         Tail = this;
-        
+
         Announce(V);
       }
     };
-    
-    
+
+
     /// Iterators for registry entries.
-    /// 
+    ///
     class iterator {
       const node *Cur;
-      
+
     public:
       explicit iterator(const node *N) : Cur(N) {}
-      
+
       bool operator==(const iterator &That) const { return Cur == That.Cur; }
       bool operator!=(const iterator &That) const { return Cur != That.Cur; }
       iterator &operator++() { Cur = Cur->Next; return *this; }
       const entry &operator*() const { return Cur->Val; }
       const entry *operator->() const { return &Cur->Val; }
     };
-    
+
     static iterator begin() { return iterator(Head); }
     static iterator end()   { return iterator(0); }
-    
-    
+
+
     /// Abstract base class for registry listeners, which are informed when new
     /// entries are added to the registry. Simply subclass and instantiate:
-    /// 
+    ///
     ///   class CollectorPrinter : public Registry<Collector>::listener {
     ///   protected:
     ///     void registered(const Registry<Collector>::entry &e) {
     ///       cerr << "collector now available: " << e->getName() << "\n";
     ///     }
-    ///   
+    ///
     ///   public:
     ///     CollectorPrinter() { init(); }  // Print those already registered.
     ///   };
-    /// 
+    ///
     ///   CollectorPrinter Printer;
-    /// 
+    ///
     class listener {
       listener *Prev, *Next;
-      
+
       friend void Registry::Announce(const entry &E);
-      
+
     protected:
       /// Called when an entry is added to the registry.
-      /// 
+      ///
       virtual void registered(const entry &) = 0;
-      
+
       /// Calls 'registered' for each pre-existing entry.
-      /// 
+      ///
       void init() {
         for (iterator I = begin(), E = end(); I != E; ++I)
           registered(*I);
       }
-      
+
     public:
       listener() : Prev(ListenerTail), Next(0) {
         if (Prev)
@@ -162,7 +162,7 @@ namespace llvm {
           ListenerHead = this;
         ListenerTail = this;
       }
-      
+
       virtual ~listener() {
         if (Next)
           Next->Prev = Prev;
@@ -174,79 +174,79 @@ namespace llvm {
           ListenerHead = Next;
       }
     };
-    
-    
+
+
     /// A static registration template. Use like such:
-    /// 
+    ///
     ///   Registry<Collector>::Add<FancyGC>
     ///   X("fancy-gc", "Newfangled garbage collector.");
-    /// 
+    ///
     /// Use of this template requires that:
-    /// 
+    ///
     ///  1. The registered subclass has a default constructor.
-    // 
+    //
     ///  2. The registry entry type has a constructor compatible with this
     ///     signature:
-    /// 
+    ///
     ///       entry(const char *Name, const char *ShortDesc, T *(*Ctor)());
-    /// 
+    ///
     /// If you have more elaborate requirements, then copy and modify.
-    /// 
+    ///
     template <typename V>
     class Add {
       entry Entry;
       node Node;
-      
+
       static T *CtorFn() { return new V(); }
-      
+
     public:
       Add(const char *Name, const char *Desc)
         : Entry(Name, Desc, CtorFn), Node(Entry) {}
     };
-    
-    
+
+
     /// A command-line parser for a registry. Use like such:
-    /// 
+    ///
     ///   static cl::opt<Registry<Collector>::entry, false,
     ///                  Registry<Collector>::Parser>
     ///   GCOpt("gc", cl::desc("Garbage collector to use."),
     ///               cl::value_desc());
-    ///   
+    ///
     /// To make use of the value:
-    /// 
+    ///
     ///   Collector *TheCollector = GCOpt->instantiate();
-    /// 
+    ///
     class Parser : public cl::parser<const typename U::entry*>, public listener{
       typedef U traits;
       typedef typename U::entry entry;
-      
+
     protected:
       void registered(const entry &E) {
         addLiteralOption(traits::nameof(E), &E, traits::descof(E));
       }
-      
+
     public:
       void initialize(cl::Option &O) {
         listener::init();
         cl::parser<const typename U::entry*>::initialize(O);
       }
     };
-    
+
   };
-  
-  
+
+
   template <typename T, typename U>
   typename Registry<T,U>::node *Registry<T,U>::Head;
-  
+
   template <typename T, typename U>
   typename Registry<T,U>::node *Registry<T,U>::Tail;
-  
+
   template <typename T, typename U>
   typename Registry<T,U>::listener *Registry<T,U>::ListenerHead;
-  
+
   template <typename T, typename U>
   typename Registry<T,U>::listener *Registry<T,U>::ListenerTail;
-  
+
 }
 
 #endif
diff --git a/include/llvm/Target/TargetMachineRegistry.h b/include/llvm/Target/TargetMachineRegistry.h
index 2607ad5e63..d14308547e 100644
--- a/include/llvm/Target/TargetMachineRegistry.h
+++ b/include/llvm/Target/TargetMachineRegistry.h
@@ -22,14 +22,14 @@
 namespace llvm {
   class Module;
   class TargetMachine;
-  
+
   struct TargetMachineRegistryEntry {
     const char *Name;
     const char *ShortDesc;
     TargetMachine *(*CtorFn)(const Module &, const std::string &);
     unsigned (*ModuleMatchQualityFn)(const Module &M);
     unsigned (*JITMatchQualityFn)();
-    
+
   public:
     TargetMachineRegistryEntry(const char *N, const char *SD,
                       TargetMachine *(*CF)(const Module &, const std::string &),
@@ -38,12 +38,12 @@ namespace llvm {
       : Name(N), ShortDesc(SD), CtorFn(CF), ModuleMatchQualityFn(MMF),
         JITMatchQualityFn(JMF) {}
   };
-  
+
   template<>
   class RegistryTraits<TargetMachine> {
   public:
     typedef TargetMachineRegistryEntry entry;
-    
+
     static const char *nameof(const entry &Entry) { return Entry.Name; }
     static const char *descof(const entry &Entry) { return Entry.ShortDesc; }
   };
@@ -67,12 +67,12 @@ namespace llvm {
   /// themselves with the tool they are linked.  Targets should define an
   /// instance of this and implement the static methods described in the
   /// TargetMachine comments.
-  /// The type 'TargetMachineImpl' should provide a constructor with two 
+  /// The type 'TargetMachineImpl' should provide a constructor with two
   /// parameters:
   /// - const Module& M: the module that is being compiled:
-  /// - const std::string& FS: target-specific string describing target 
+  /// - const std::string& FS: target-specific string describing target
   ///   flavour.
-  
+
   template<class TargetMachineImpl>
   struct RegisterTarget {
     RegisterTarget(const char *Name, const char *ShortDesc)
@@ -85,7 +85,7 @@ namespace llvm {
   private:
     TargetMachineRegistry::entry Entry;
     TargetMachineRegistry::node Node;
-    
+
     static TargetMachine *Allocator(const Module &M, const std::string &FS) {
       return new TargetMachineImpl(M, FS);
     }
diff --git a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
index 4e42df579d..d2e8d0026b 100644
--- a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
@@ -10,7 +10,7 @@
 // This file implements printing the assembly code for an Ocaml frametable.
 //
 //===----------------------------------------------------------------------===//
-                        
+
 #include "llvm/CodeGen/GCs.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/GCMetadataPrinter.h"
@@ -28,11 +28,11 @@ namespace {
   public:
     void beginAssembly(raw_ostream &OS, AsmPrinter &AP,
                        const TargetAsmInfo &TAI);
-    
+
     void finishAssembly(raw_ostream &OS, AsmPrinter &AP,
                         const TargetAsmInfo &TAI);
   };
-  
+
 }
 
 static GCMetadataPrinterRegistry::Add<OcamlGCMetadataPrinter>
@@ -43,7 +43,7 @@ void llvm::linkOcamlGCPrinter() { }
 static void EmitCamlGlobal(const Module &M, raw_ostream &OS, AsmPrinter &AP,
                            const TargetAsmInfo &TAI, const char *Id) {
   const std::string &MId = M.getModuleIdentifier();
-  
+
   std::string Mangled;
   Mangled += TAI.getGlobalPrefix();
   Mangled += "caml";
@@ -51,10 +51,10 @@ static void EmitCamlGlobal(const Module &M, raw_ostream &OS, AsmPrinter &AP,
   Mangled.append(MId.begin(), std::find(MId.begin(), MId.end(), '.'));
   Mangled += "__";
   Mangled += Id;
-  
+
   // Capitalize the first letter of the module name.
   Mangled[Letter] = toupper(Mangled[Letter]);
-  
+
   if (const char *GlobalDirective = TAI.getGlobalDirective())
     OS << GlobalDirective << Mangled << "\n";
   OS << Mangled << ":\n";
@@ -64,13 +64,13 @@ void OcamlGCMetadataPrinter::beginAssembly(raw_ostream &OS, AsmPrinter &AP,
                                            const TargetAsmInfo &TAI) {
   AP.SwitchToSection(TAI.getTextSection());
   EmitCamlGlobal(getModule(), OS, AP, TAI, "code_begin");
-  
+
   AP.SwitchToSection(TAI.getDataSection());
   EmitCamlGlobal(getModule(), OS, AP, TAI, "data_begin");
 }
 
 /// emitAssembly - Print the frametable. The ocaml frametable format is thus:
-/// 
+///
 ///   extern "C" struct align(sizeof(intptr_t)) {
 ///     uint16_t NumDescriptors;
 ///     struct align(sizeof(intptr_t)) {
@@ -80,11 +80,11 @@ void OcamlGCMetadataPrinter::beginAssembly(raw_ostream &OS, AsmPrinter &AP,
 ///       uint16_t LiveOffsets[NumLiveOffsets];
 ///     } Descriptors[NumDescriptors];
 ///   } caml${module}__frametable;
-/// 
+///
 /// Note that this precludes programs from stack frames larger than 64K
 /// (FrameSize and LiveOffsets would overflow). FrameTablePrinter will abort if
 /// either condition is detected in a function which uses the GC.
-/// 
+///
 void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP,
                                             const TargetAsmInfo &TAI) {
   const char *AddressDirective;
@@ -99,19 +99,19 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP,
 
   AP.SwitchToSection(TAI.getTextSection());
   EmitCamlGlobal(getModule(), OS, AP, TAI, "code_end");
-  
+
   AP.SwitchToSection(TAI.getDataSection());
   EmitCamlGlobal(getModule(), OS, AP, TAI, "data_end");
-  
+
   OS << AddressDirective << 0; // FIXME: Why does ocaml emit this??
   AP.EOL();
-  
+
   AP.SwitchToSection(TAI.getDataSection());
   EmitCamlGlobal(getModule(), OS, AP, TAI, "frametable");
-  
+
   for (iterator I = begin(), IE = end(); I != IE; ++I) {
     GCFunctionInfo &FI = **I;
-    
+
     uint64_t FrameSize = FI.getFrameSize();
     if (FrameSize >= 1<<16) {
       cerr << "Function '" << FI.getFunction().getNameStart()
@@ -120,10 +120,10 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP,
       cerr << "(" << uintptr_t(&FI) << ")\n";
       abort(); // Very rude!
     }
-    
+
     OS << "\t" << TAI.getCommentString() << " live roots for "
        << FI.getFunction().getNameStart() << "\n";
-    
+
     for (GCFunctionInfo::iterator J = FI.begin(), JE = FI.end(); J != JE; ++J) {
       size_t LiveCount = FI.live_size(J);
       if (LiveCount >= 1<<16) {
@@ -132,27 +132,27 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP,
              << "Live root count " << LiveCount << " >= 65536.\n";
         abort(); // Very rude!
       }
-      
+
       OS << AddressDirective
          << TAI.getPrivateGlobalPrefix() << "label" << J->Num;
       AP.EOL("call return address");
-      
+
       AP.EmitInt16(FrameSize);
       AP.EOL("stack frame size");
-      
+
       AP.EmitInt16(LiveCount);
       AP.EOL("live root count");
-      
+
       for (GCFunctionInfo::live_iterator K = FI.live_begin(J),
                                          KE = FI.live_end(J); K != KE; ++K) {
         assert(K->StackOffset < 1<<16 &&
                "GC root stack offset is outside of fixed stack frame and out "
                "of range for ocaml GC!");
-        
+
         OS << "\t.word\t" << K->StackOffset;
         AP.EOL("stack offset");
       }
-      
+
       AP.EmitAlignment(AddressAlignLog);
     }
   }
diff --git a/lib/CodeGen/OcamlGC.cpp b/lib/CodeGen/OcamlGC.cpp
index 0b90444406..5c6e29a6b0 100644
--- a/lib/CodeGen/OcamlGC.cpp
+++ b/lib/CodeGen/OcamlGC.cpp
@@ -9,11 +9,11 @@
 //
 // This file implements lowering for the llvm.gc* intrinsics compatible with
 // Objective Caml 3.10.0, which uses a liveness-accurate static stack map.
-// 
+//
 // The frametable emitter is in OcamlGCPrinter.cpp.
 //
 //===----------------------------------------------------------------------===//
-                        
+
 #include "llvm/CodeGen/GCs.h"
 #include "llvm/CodeGen/GCStrategy.h"
 
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 241ad00e56..6dc45bdb2b 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -148,7 +148,7 @@ namespace llvm {
   /// have aggregate-typed registers. The values at this point do not necessarily
   /// have legal types, so each value may require one or more registers of some
   /// legal type.
-  /// 
+  ///
   struct VISIBILITY_HIDDEN RegsForValue {
     /// TLI - The TargetLowering object.
     ///
@@ -158,7 +158,7 @@ namespace llvm {
     /// may need be promoted or synthesized from one or more registers.
     ///
     SmallVector<MVT, 4> ValueVTs;
-    
+
     /// RegVTs - The value types of the registers. This is the same size as
     /// ValueVTs and it records, for each value, what the type of the assigned
     /// register or registers are. (Individual values are never synthesized
@@ -169,21 +169,21 @@ namespace llvm {
     /// it is necessary to have a separate record of the types.
     ///
     SmallVector<MVT, 4> RegVTs;
-    
+
     /// Regs - This list holds the registers assigned to the values.
     /// Each legal or promoted value requires one register, and each
     /// expanded value requires multiple registers.
     ///
     SmallVector<unsigned, 4> Regs;
-    
+
     RegsForValue() : TLI(0) {}
-    
+
     RegsForValue(const TargetLowering &tli,
-                 const SmallVector<unsigned, 4> &regs, 
+                 const SmallVector<unsigned, 4> &regs,
                  MVT regvt, MVT valuevt)
       : TLI(&tli),  ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
     RegsForValue(const TargetLowering &tli,
-                 const SmallVector<unsigned, 4> &regs, 
+                 const SmallVector<unsigned, 4> &regs,
                  const SmallVector<MVT, 4> &regvts,
                  const SmallVector<MVT, 4> &valuevts)
       : TLI(&tli), ValueVTs(valuevts), RegVTs(regvts), Regs(regs) {}
@@ -201,7 +201,7 @@ namespace llvm {
         Reg += NumRegs;
       }
     }
-    
+
     /// append - Add the specified values to this one.
     void append(const RegsForValue &RHS) {
       TLI = RHS.TLI;
@@ -209,24 +209,24 @@ namespace llvm {
       RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
       Regs.append(RHS.Regs.begin(), RHS.Regs.end());
     }
-    
-    
+
+
     /// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
-    /// this value and returns the result as a ValueVTs value.  This uses 
+    /// this value and returns the result as a ValueVTs value.  This uses
     /// Chain/Flag as the input and updates them for the output Chain/Flag.
     /// If the Flag pointer is NULL, no flag is used.
     SDValue getCopyFromRegs(SelectionDAG &DAG,
                               SDValue &Chain, SDValue *Flag) const;
 
     /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
-    /// specified value into the registers specified by this object.  This uses 
+    /// specified value into the registers specified by this object.  This uses
     /// Chain/Flag as the input and updates them for the output Chain/Flag.
     /// If the Flag pointer is NULL, no flag is used.
     void getCopyToRegs(SDValue Val, SelectionDAG &DAG,
                        SDValue &Chain, SDValue *Flag) const;
-    
+
     /// AddInlineAsmOperands - Add this value to the specified inlineasm node
-    /// operand list.  This adds the code marker and includes the number of 
+    /// operand list.  This adds the code marker and includes the number of
     /// values added into it.
     void AddInlineAsmOperands(unsigned Code, SelectionDAG &DAG,
                               std::vector<SDValue> &Ops) const;
@@ -234,7 +234,7 @@ namespace llvm {
 }
 
 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
-/// PHI nodes or outside of the basic block that defines it, or used by a 
+/// PHI nodes or outside of the basic block that defines it, or used by a
 /// switch or atomic instruction, which may expand to multiple basic blocks.
 static bool isUsedOutsideOfDefiningBlock(Instruction *I) {
   if (isa<PHINode>(I)) return true;
@@ -291,7 +291,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
       if (ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
         const Type *Ty = AI->getAllocatedType();
         uint64_t TySize = TLI.getTargetData()->getTypePaddedSize(Ty);
-        unsigned Align = 
+        unsigned Align =
           std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
                    AI->getAlignment());
 
@@ -321,7 +321,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
     PHINode *PN;
     for (BasicBlock::iterator I = BB->begin();(PN = dyn_cast<PHINode>(I)); ++I){
       if (PN->use_empty()) continue;
-      
+
       unsigned PHIReg = ValueMap[PN];
       assert(PHIReg && "PHI node does not have an assigned virtual register!");
 
@@ -667,7 +667,7 @@ static void getCopyToParts(SelectionDAG &DAG, SDValue Val,
                                            PtrVT));
     else
       Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT,
-                           IntermediateVT, Val, 
+                           IntermediateVT, Val,
                            DAG.getConstant(i, PtrVT));
 
   // Split the intermediate operands into legal parts.
@@ -777,7 +777,7 @@ void SelectionDAGLowering::visit(unsigned Opcode, User &I) {
   case Instruction::OPCODE:return visit##OPCODE((CLASS&)I);
 #include "llvm/Instruction.def"
   }
-} 
+}
 
 void SelectionDAGLowering::visitAdd(User &I) {
   if (I.getType()->isFPOrFPVector())
@@ -796,22 +796,22 @@ void SelectionDAGLowering::visitMul(User &I) {
 SDValue SelectionDAGLowering::getValue(const Value *V) {
   SDValue &N = NodeMap[V];
   if (N.getNode()) return N;
-  
+
   if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(V))) {
     MVT VT = TLI.getValueType(V->getType(), true);
-    
+
     if (ConstantInt *CI = dyn_cast<ConstantInt>(C))
       return N = DAG.getConstant(*CI, VT);
 
     if (GlobalValue *GV = dyn_cast<GlobalValue>(C))
       return N = DAG.getGlobalAddress(GV, VT);
-    
+
     if (isa<ConstantPointerNull>(C))
       return N = DAG.getConstant(0, TLI.getPointerTy());
-    
+
     if (ConstantFP *CFP = dyn_cast<ConstantFP>(C))
       return N = DAG.getConstantFP(*CFP, VT);
-    
+
     if (isa<UndefValue>(C) && !isa<VectorType>(V->getType()) &&
         !V->getType()->isAggregateType())
       return N = DAG.getNode(ISD::UNDEF, VT);
@@ -822,7 +822,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
       assert(N1.getNode() && "visit didn't populate the ValueMap!");
       return N1;
     }
-    
+
     if (isa<ConstantStruct>(C) || isa<ConstantArray>(C)) {
       SmallVector<SDValue, 4> Constants;
       for (User::const_op_iterator OI = C->op_begin(), OE = C->op_end();
@@ -858,7 +858,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
 
     const VectorType *VecTy = cast<VectorType>(V->getType());
     unsigned NumElements = VecTy->getNumElements();
-    
+
     // Now that we know the number and type of the elements, get that number of
     // elements into the Ops array based on what kind of constant it is.
     SmallVector<SDValue, 16> Ops;
@@ -879,11 +879,11 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
         Op = DAG.getConstant(0, EltVT);
       Ops.assign(NumElements, Op);
     }
-    
+
     // Create a BUILD_VECTOR node.
     return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
   }
-      
+
   // If this is a static alloca, generate it as the frameindex instead of
   // computation.
   if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
@@ -892,10 +892,10 @@ SDValue SelectionDAGLowering::getValue(const Value *V) {
     if (SI != FuncInfo.StaticAllocaMap.end())
       return DAG.getFrameIndex(SI->second, TLI.getPointerTy());
   }
-      
+
   unsigned InReg = FuncInfo.ValueMap[V];
   assert(InReg && "Value not in map!");
-  
+
   RegsForValue RFV(TLI, InReg, V->getType());
   SDValue Chain = DAG.getEntryNode();
   return RFV.getCopyFromRegs(DAG, Chain, NULL);
@@ -907,10 +907,10 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
     DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getControlRoot()));
     return;
   }
-  
+
   SmallVector<SDValue, 8> NewValues;
   NewValues.push_back(getControlRoot());
-  for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {  
+  for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
     SmallVector<MVT, 4> ValueVTs;
     ComputeValueVTs(TLI, I.getOperand(i)->getType(), ValueVTs);
     unsigned NumValues = ValueVTs.size();
@@ -933,7 +933,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
       MVT PartVT = TLI.getRegisterType(VT);
       SmallVector<SDValue, 4> Parts(NumParts);
       ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
-  
+
       const Function *F = I.getParent()->getParent();
       if (F->paramHasAttr(0, Attribute::SExt))
         ExtendKind = ISD::SIGN_EXTEND;
@@ -963,7 +963,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
 void SelectionDAGLowering::ExportFromCurrentBlock(Value *V) {
   // No need to export constants.
   if (!isa<Instruction>(V) && !isa<Argument>(V)) return;
-  
+
   // Already exported?
   if (FuncInfo.isExportedInst(V)) return;
 
@@ -979,11 +979,11 @@ bool SelectionDAGLowering::isExportableFromCurrentBlock(Value *V,
     // Can export from current BB.
     if (VI->getParent() == FromBB)
       return true;
-    
+
     // Is already exported, noop.
     return FuncInfo.isExportedInst(V);
   }
-  
+
   // If this is an argument, we can export it if the BB is the entry block or
   // if it is already exported.
   if (isa<Argument>(V)) {
@@ -993,7 +993,7 @@ bool SelectionDAGLowering::isExportableFromCurrentBlock(Value *V,
     // Otherwise, can only export this if it is already exported.
     return FuncInfo.isExportedInst(V);
   }
-  
+
   // Otherwise, constants can always be exported.
   return true;
 }
@@ -1034,7 +1034,7 @@ static ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred) {
   }
   if (FiniteOnlyFPMath())
     return FOC;
-  else 
+  else
     return FPC;
 }
 
@@ -1102,7 +1102,7 @@ SelectionDAGLowering::EmitBranchForMergedCondition(Value *Cond,
   SwitchCases.push_back(CB);
 }
 
-/// FindMergedConditions - If Cond is an expression like 
+/// FindMergedConditions - If Cond is an expression like
 void SelectionDAGLowering::FindMergedConditions(Value *Cond,
                                                 MachineBasicBlock *TBB,
                                                 MachineBasicBlock *FBB,
@@ -1110,7 +1110,7 @@ void SelectionDAGLowering::FindMergedConditions(Value *Cond,
                                                 unsigned Opc) {
   // If this node is not part of the or/and tree, emit it as a branch.
   Instruction *BOp = dyn_cast<Instruction>(Cond);
-  if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) || 
+  if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
       (unsigned)BOp->getOpcode() != Opc || !BOp->hasOneUse() ||
       BOp->getParent() != CurBB->getBasicBlock() ||
       !InBlock(BOp->getOperand(0), CurBB->getBasicBlock()) ||
@@ -1118,13 +1118,13 @@ void SelectionDAGLowering::FindMergedConditions(Value *Cond,
     EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB);
     return;
   }
-  
+
   //  Create TmpBB after CurBB.
   MachineFunction::iterator BBI = CurBB;
   MachineFunction &MF = DAG.getMachineFunction();
   MachineBasicBlock *TmpBB = MF.CreateMachineBasicBlock(CurBB->getBasicBlock());
   CurBB->getParent()->insert(++BBI, TmpBB);
-  
+
   if (Opc == Instruction::Or) {
     // Codegen X | Y as:
     //   jmp_if_X TBB
@@ -1133,10 +1133,10 @@ void SelectionDAGLowering::FindMergedConditions(Value *Cond,
     //   jmp_if_Y TBB
     //   jmp FBB
     //
-  
+
     // Emit the LHS condition.
     FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, Opc);
-  
+
     // Emit the RHS condition into TmpBB.
     FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, Opc);
   } else {
@@ -1149,10 +1149,10 @@ void SelectionDAGLowering::FindMergedConditions(Value *Cond,
     //   jmp FBB
     //
     //  This requires creation of TmpBB after CurBB.
-    
+
     // Emit the LHS condition.
     FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurBB, Opc);
-    
+
     // Emit the RHS condition into TmpBB.
     FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, Opc);
   }
@@ -1161,10 +1161,10 @@ void SelectionDAGLowering::FindMergedConditions(Value *Cond,
 /// If the set of cases should be emitted as a series of branches, return true.
 /// If we should emit this as a bunch of and/or'd together conditions, return
 /// false.
-bool 
+bool
 SelectionDAGLowering::ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases){
   if (Cases.size() != 2) return true;
-  
+
   // If this is two comparisons of the same values or'd or and'd together, they
   // will get folded into a single comparison, so don't emit two blocks.
   if ((Cases[0].CmpLHS == Cases[1].CmpLHS &&
@@ -1173,7 +1173,7 @@ SelectionDAGLowering::ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases){
        Cases[0].CmpLHS == Cases[1].CmpRHS)) {
     return false;
   }
-  
+
   return true;
 }
 
@@ -1190,7 +1190,7 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
   if (I.isUnconditional()) {
     // Update machine-CFG edges.
     CurMBB->addSuccessor(Succ0MBB);
-    
+
     // If this is not a fall-through branch, emit the branch.
     if (Succ0MBB != NextBlock)
       DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getControlRoot(),
@@ -1207,9 +1207,9 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
   // this as a sequence of branches instead of setcc's with and/or operations.
   // For example, instead of something like:
   //     cmp A, B
-  //     C = seteq 
+  //     C = seteq
   //     cmp D, E
-  //     F = setle 
+  //     F = setle
   //     or C, F
   //     jnz foo
   // Emit:
@@ -1219,7 +1219,7 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
   //     jle foo
   //
   if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
-    if (BOp->hasOneUse() && 
+    if (BOp->hasOneUse() &&
         (BOp->getOpcode() == Instruction::And ||
          BOp->getOpcode() == Instruction::Or)) {
       FindMergedConditions(BOp, Succ0MBB, Succ1MBB, CurMBB, BOp->getOpcode());
@@ -1227,29 +1227,29 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
       // exported from this block, export them now.  This block should always
       // be the first entry.
       assert(SwitchCases[0].ThisBB == CurMBB && "Unexpected lowering!");
-      
+
       // Allow some cases to be rejected.
       if (ShouldEmitAsBranches(SwitchCases)) {
         for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i) {
           ExportFromCurrentBlock(SwitchCases[i].CmpLHS);
           ExportFromCurrentBlock(SwitchCases[i].CmpRHS);
         }
-        
+
         // Emit the branch for this block.
         visitSwitchCase(SwitchCases[0]);
         SwitchCases.erase(SwitchCases.begin());
         return;
       }
-      
+
       // Okay, we decided not to do this, remove any inserted MBB's and clear
       // SwitchCases.
       for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i)
         CurMBB->getParent()->erase(SwitchCases[i].ThisBB);
-      
+
       SwitchCases.clear();
     }
   }
-  
+
   // Create a CaseBlock record representing this branch.
   CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(),
                NULL, Succ0MBB, Succ1MBB, CurMBB);
@@ -1785,9 +1785,9 @@ bool SelectionDAGLowering::handleBTSplitSwitchCase(CaseRec& CR,
   MachineBasicBlock *FalseBB = 0, *TrueBB = 0;
 
   // We know that we branch to the LHS if the Value being switched on is
-  // less than the Pivot value, C.  We use this to optimize our binary 
+  // less than the Pivot value, C.  We use this to optimize our binary
   // tree a bit, by recognizing that if SV is greater than or equal to the
-  // LHS's Case Value, and that Case Value is exactly one less than the 
+  // LHS's Case Value, and that Case Value is exactly one less than the
   // Pivot's Value, then we can branch directly to the LHS's Target,
   // rather than creating a leaf node for it.
   if ((LHSR.second - LHSR.first) == 1 &&
@@ -1816,7 +1816,7 @@ bool SelectionDAGLowering::handleBTSplitSwitchCase(CaseRec& CR,
   }
 
   // Create a CaseBlock record representing a conditional branch to
-  // the LHS node if the value being switched on SV is less than C. 
+  // the LHS node if the value being switched on SV is less than C.
   // Otherwise, branch to LHS.
   CaseBlock CB(ISD::SETLT, SV, C, NULL, TrueBB, FalseBB, CR.CaseBB);
 
@@ -2094,7 +2094,7 @@ void SelectionDAGLowering::visitSub(User &I) {
 void SelectionDAGLowering::visitBinary(User &I, unsigned OpCode) {
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
-  
+
   setValue(&I, DAG.getNode(OpCode, Op1.getValueType(), Op1, Op2));
 }
 
@@ -2107,7 +2107,7 @@ void SelectionDAGLowering::visitShift(User &I, unsigned Opcode) {
     else if (TLI.getShiftAmountTy().bitsGT(Op2.getValueType()))
       Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
   }
-  
+
   setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), O