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authorKevin Enderby <enderby@apple.com>2010-10-27 20:46:49 +0000
committerKevin Enderby <enderby@apple.com>2010-10-27 20:46:49 +0000
commit529b1a43986265fb399eecd0dcbf9c409d049853 (patch)
tree3227aebb6b34d098b7e4c2ea0e1bbb91375d4552
parentccf72caa92ba03fcaf348f9d8c7d14eb5738a31e (diff)
Added the x86 instruction ud2b (2nd official undefined instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrSystem.td4
-rw-r--r--test/MC/X86/x86-32.s4
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp1
3 files changed, 7 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td
index 48b6d6ecf0..1a58ba0f96 100644
--- a/lib/Target/X86/X86InstrSystem.td
+++ b/lib/Target/X86/X86InstrSystem.td
@@ -21,8 +21,10 @@ let Defs = [RAX, RCX, RDX] in
// CPU flow control instructions
-let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
+let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in {
def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
+ def UD2B : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
+}
def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", []>;
def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", []>, TB;
diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 588a43a323..c104f45a40 100644
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -786,3 +786,7 @@ pshufw $90, %mm4, %mm0
// CHECK: ud2
// CHECK: encoding: [0x0f,0x0b]
ud2a
+
+// CHECK: ud2b
+// CHECK: encoding: [0x0f,0xb9]
+ ud2b
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index dcbce4d88e..1343fcf5ad 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -114,7 +114,6 @@ namespace X86Local {
EXTENSION_TABLE(72) \
EXTENSION_TABLE(73) \
EXTENSION_TABLE(ae) \
- EXTENSION_TABLE(b9) \
EXTENSION_TABLE(ba) \
EXTENSION_TABLE(c7)