diff options
author | Anton Korobeynikov <asl@math.spbu.ru> | 2007-07-05 20:36:08 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2007-07-05 20:36:08 +0000 |
commit | 4304bcc1edd75c8db64b46c3f99871a8bb4515a7 (patch) | |
tree | 299c7c7a41794a68e45619c3dc9d4b4da7dbb871 | |
parent | 50b153335d2943a95acf37d7ee84095f8e8af53c (diff) |
Proper flag __alloca call
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37923 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 939cfd556a..b8dad13ee0 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3602,8 +3602,9 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { // bytes in one go. Touching the stack at 4K increments is necessary to ensure // that the guard pages used by the OS virtual memory manager are allocated in // correct sequence. -SDOperand X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, - SelectionDAG &DAG) { +SDOperand +X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, + SelectionDAG &DAG) { assert(Subtarget->isTargetCygMing() && "This should be used only on Cygwin/Mingw targets"); @@ -3612,27 +3613,29 @@ SDOperand X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, SDOperand Size = Op.getOperand(1); // FIXME: Ensure alignment here - TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; + SDOperand Flag; + MVT::ValueType IntPtr = getPointerTy(); MVT::ValueType SPTy = (Subtarget->is64Bit() ? MVT::i64 : MVT::i32); - const Type *IntPtrTy = getTargetData()->getIntPtrType(); - - Entry.Node = Size; - Entry.Ty = IntPtrTy; - Entry.isInReg = true; // Should pass in EAX - Args.push_back(Entry); - std::pair<SDOperand, SDOperand> CallResult = - LowerCallTo(Chain, IntPtrTy, false, false, CallingConv::C, false, - DAG.getExternalSymbol("_alloca", IntPtr), Args, DAG); - - SDOperand SP = DAG.getCopyFromReg(CallResult.second, X86StackPtr, SPTy); + + Chain = DAG.getCopyToReg(Chain, X86::EAX, Size, Flag); + Flag = Chain.getValue(1); + + SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); + SDOperand Ops[] = { Chain, + DAG.getTargetExternalSymbol("_alloca", IntPtr), + DAG.getRegister(X86::EAX, IntPtr), + Flag }; + Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops, 4); + Flag = Chain.getValue(1); + + Chain = DAG.getCopyFromReg(Chain, X86StackPtr, SPTy).getValue(1); std::vector<MVT::ValueType> Tys; Tys.push_back(SPTy); Tys.push_back(MVT::Other); - SDOperand Ops[2] = { SP, CallResult.second }; - return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops, 2); + SDOperand Ops1[2] = { Chain.getValue(0), Chain }; + return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops1, 2); } SDOperand |