diff options
author | Chris Lattner <sabre@nondot.org> | 2009-06-27 04:46:33 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2009-06-27 04:46:33 +0000 |
commit | 380135cc3e320c74417f66c14407121e07926e3c (patch) | |
tree | b67605e034f61a52f81e33576d4cddbcc2ee092d | |
parent | 74d3f50a803347432b3dc26f67e23297c2a1f232 (diff) |
fix a bunch of failures in the X86-64 JIT by tolerating RIP as
a base register. We just ignore it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index e988a5ca9d..d5846a049a 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -301,7 +301,7 @@ bool Emitter<CodeEmitter>::gvNeedsNonLazyPtr(const GlobalValue *GV) { template<class CodeEmitter> void Emitter<CodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp, - int DispVal, intptr_t PCAdj) { + int DispVal, intptr_t PCAdj) { // If this is a simple integer displacement that doesn't require a relocation, // emit it now. if (!RelocOp) { @@ -371,8 +371,10 @@ void Emitter<CodeEmitter>::emitMemModRMByte(const MachineInstr &MI, // Is a SIB byte needed? if ((!Is64BitMode || DispForReloc || BaseReg != 0) && IndexReg.getReg() == 0 && - (BaseReg == 0 || getX86RegNum(BaseReg) != N86::ESP)) { - if (BaseReg == 0) { // Just a displacement? + (BaseReg == 0 || BaseReg == X86::RIP || + getX86RegNum(BaseReg) != N86::ESP)) { + if (BaseReg == 0 || + BaseReg == X86::RIP) { // Just a displacement? // Emit special case [disp32] encoding MCE.emitByte(ModRMByte(0, RegOpcodeField, 5)); |