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| author | Johnny Chen <johnny.chen@apple.com> | 2011-03-22 22:28:49 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-03-22 22:28:49 +0000 |
| commit | 27c6baeca23be295d13da6a010d203b280058444 (patch) | |
| tree | f3b51d5ccce0f3bd943a2c092667133b6a0ccc4a | |
| parent | bdf2c360dec909333c488ed7bb7bf014abec356d (diff) | |
LDRT and LDRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.
This fixed http://llvm.org/bugs/show_bug.cgi?id=9530.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128113 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/arm-tests.txt | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 0c07d70934..d18c0ee1a5 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1700,13 +1700,13 @@ defm LDRD : AI3_ldridx<0b1101, 0, "ldrd", IIC_iLoad_d_ru>; // LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT are for disassembly only. let mayLoad = 1, neverHasSideEffects = 1 in { def LDRT : AI2ldstidx<1, 0, 0, (outs GPR:$dst, GPR:$base_wb), - (ins GPR:$base, am2offset:$offset), IndexModeNone, + (ins GPR:$base, am2offset:$offset), IndexModePost, LdFrm, IIC_iLoad_ru, "ldrt", "\t$dst, [$base], $offset", "$base = $base_wb", []> { let Inst{21} = 1; // overwrite } def LDRBT : AI2ldstidx<1, 1, 0, (outs GPR:$dst, GPR:$base_wb), - (ins GPR:$base, am2offset:$offset), IndexModeNone, + (ins GPR:$base, am2offset:$offset), IndexModePost, LdFrm, IIC_iLoad_bh_ru, "ldrbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> { let Inst{21} = 1; // overwrite diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 4f7dcff8e4..b9645e17e0 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -163,3 +163,6 @@ # CHECK: ldrdeq r2, [r0], -r12 0xdc 0x24 0x00 0x00 + +# CHECK: ldrbt r3, [r4], -r5, lsl #12 +0x05 0x36 0x74 0xe6 |