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authorBrian Gaeke <gaeke@uiuc.edu>2004-07-27 17:43:22 +0000
committerBrian Gaeke <gaeke@uiuc.edu>2004-07-27 17:43:22 +0000
commit1b4aeb5cec6b6732d0833bac388c20de04fab961 (patch)
tree925a4e006112bc9d84ed1571be27d996b20e3158
parent96d4bf7aee0c6ce915e6eb77065df388f374fafb (diff)
As it happens, none of these TargetInstrInfo methods which are only
used in the SparcV9 backend really have anything to do with TargetInstrInfo, so we're converting them into regular old global functions and moving their declarations to SparcV9InstrSelectionSupport.h. (They're mostly used as helper functions for SparcV9InstrSelection.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15277 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Target/TargetInstrInfo.h122
-rw-r--r--lib/Target/SparcV9/SparcV9InstrInfo.h104
-rw-r--r--lib/Target/SparcV9/SparcV9InstrSelectionSupport.h90
3 files changed, 90 insertions, 226 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 815a2d9729..7b08389919 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -252,128 +252,6 @@ public:
/// sense for primitive types.
///
virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const;
-
- // Test if this constant may not fit in the immediate field of the
- // machine instructions (probably) generated for this instruction.
- //
- virtual bool ConstantMayNotFitInImmedField(const Constant* CV,
- const Instruction* I) const {
- return true; // safe but very conservative
- }
-
- // Get certain common op codes for the current target. this and all the
- // Create* methods below should be moved to a machine code generation class
- //
- virtual MachineOpCode getNOPOpCode() const { abort(); }
-
- // Get the value of an integral constant in the form that must
- // be put into the machine register. The specified constant is interpreted
- // as (i.e., converted if necessary to) the specified destination type. The
- // result is always returned as an uint64_t, since the representation of
- // int64_t and uint64_t are identical. The argument can be any known const.
- //
- // isValidConstant is set to true if a valid constant was found.
- //
- virtual uint64_t ConvertConstantToIntType(const TargetMachine &target,
- const Value *V,
- const Type *destType,
- bool &isValidConstant) const {
- abort();
- }
-
- // Create an instruction sequence to put the constant `val' into
- // the virtual register `dest'. `val' may be a Constant or a
- // GlobalValue, viz., the constant address of a global variable or function.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Symbolic constants or constants that must be accessed from memory
- // are added to the constant pool via MachineFunction::get(F).
- //
- virtual void CreateCodeToLoadConst(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const {
- abort();
- }
-
- // Create an instruction sequence to copy an integer value `val'
- // to a floating point value `dest' by copying to memory and back.
- // val must be an integral type. dest must be a Float or Double.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Any stack space required is allocated via mcff.
- //
- virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& MI) const {
- abort();
- }
-
- // Similarly, create an instruction sequence to copy an FP value
- // `val' to an integer value `dest' by copying to memory and back.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Any stack space required is allocated via mcff.
- //
- virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& MI) const {
- abort();
- }
-
- // Create instruction(s) to copy src to dest, for arbitrary types
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Any stack space required is allocated via mcff.
- //
- virtual void CreateCopyInstructionsByType(const TargetMachine& target,
- Function* F,
- Value* src,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& MI) const {
- abort();
- }
-
- // Create instruction sequence to produce a sign-extended register value
- // from an arbitrary sized value (sized in bits, not bytes).
- // The generated instructions are appended to `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Any stack space required is allocated via mcff.
- //
- virtual void CreateSignExtensionInstructions(const TargetMachine& target,
- Function* F,
- Value* srcVal,
- Value* destVal,
- unsigned numLowBits,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& MI) const {
- abort();
- }
-
- // Create instruction sequence to produce a zero-extended register value
- // from an arbitrary sized value (sized in bits, not bytes).
- // The generated instructions are appended to `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- // Any stack space required is allocated via mcff.
- //
- virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
- Function* F,
- Value* srcVal,
- Value* destVal,
- unsigned srcSizeInBits,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const {
- abort();
- }
};
} // End llvm namespace
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.h b/lib/Target/SparcV9/SparcV9InstrInfo.h
index aa8db5760a..9d4d85998c 100644
--- a/lib/Target/SparcV9/SparcV9InstrInfo.h
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.h
@@ -68,110 +68,6 @@ public:
// 2 other groups, including NOPs if necessary).
return (opCode == V9::FCMPS || opCode == V9::FCMPD || opCode == V9::FCMPQ);
}
-
- //-------------------------------------------------------------------------
- // Queries about representation of LLVM quantities (e.g., constants)
- //-------------------------------------------------------------------------
-
- virtual bool ConstantMayNotFitInImmedField(const Constant* CV,
- const Instruction* I) const;
-
- //-------------------------------------------------------------------------
- // Code generation support for creating individual machine instructions
- //-------------------------------------------------------------------------
-
- // Get certain common op codes for the current target. This and all the
- // Create* methods below should be moved to a machine code generation class
- //
- virtual MachineOpCode getNOPOpCode() const { return V9::NOP; }
-
- // Get the value of an integral constant in the form that must
- // be put into the machine register. The specified constant is interpreted
- // as (i.e., converted if necessary to) the specified destination type. The
- // result is always returned as an uint64_t, since the representation of
- // int64_t and uint64_t are identical. The argument can be any known const.
- //
- // isValidConstant is set to true if a valid constant was found.
- //
- virtual uint64_t ConvertConstantToIntType(const TargetMachine &target,
- const Value *V,
- const Type *destType,
- bool &isValidConstant) const;
-
- // Create an instruction sequence to put the constant `val' into
- // the virtual register `dest'. `val' may be a Constant or a
- // GlobalValue, viz., the constant address of a global variable or function.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateCodeToLoadConst(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
-
- // Create an instruction sequence to copy an integer value `val'
- // to a floating point value `dest' by copying to memory and back.
- // val must be an integral type. dest must be a Float or Double.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
-
- // Similarly, create an instruction sequence to copy an FP value
- // `val' to an integer value `dest' by copying to memory and back.
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target,
- Function* F,
- Value* val,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
-
- // Create instruction(s) to copy src to dest, for arbitrary types
- // The generated instructions are returned in `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateCopyInstructionsByType(const TargetMachine& target,
- Function* F,
- Value* src,
- Instruction* dest,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
-
- // Create instruction sequence to produce a sign-extended register value
- // from an arbitrary sized value (sized in bits, not bytes).
- // The generated instructions are appended to `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateSignExtensionInstructions(const TargetMachine& target,
- Function* F,
- Value* srcVal,
- Value* destVal,
- unsigned int numLowBits,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
-
- // Create instruction sequence to produce a zero-extended register value
- // from an arbitrary sized value (sized in bits, not bytes).
- // The generated instructions are appended to `mvec'.
- // Any temp. registers (TmpInstruction) created are recorded in mcfi.
- //
- virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
- Function* F,
- Value* srcVal,
- Value* destVal,
- unsigned int numLowBits,
- std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const;
};
} // End llvm namespace
diff --git a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
index d205eec826..11258c7a06 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
+++ b/lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
@@ -226,6 +226,96 @@ ChooseRegOrImmed(Value* val, MachineOpCode opCode,
const TargetMachine& targetMachine, bool canUseImmed,
unsigned& getMachineRegNum, int64_t& getImmedValue);
+/// ConvertConstantToIntType - Get the value of an integral constant in the
+/// form that must be put into the machine register. The specified constant is
+/// interpreted as (i.e., converted if necessary to) the specified destination
+/// type. The result is always returned as an uint64_t, since the
+/// representation of int64_t and uint64_t are identical. The argument can be
+/// any known const. isValidConstant is set to true if a valid constant was
+/// found.
+///
+uint64_t ConvertConstantToIntType (const TargetMachine &target,
+ const Value *V, const Type *destType, bool &isValidConstant);
+
+/// ConstantMayNotFitInImmedField - Test if this constant may not fit in the
+/// immediate field of the machine instructions (probably) generated for this
+/// instruction.
+///
+bool ConstantMayNotFitInImmedField (const Constant *CV, const Instruction *I);
+
+/// CreateCodeToLoadConst - Create an instruction sequence to put the
+/// constant `val' into the virtual register `dest'. `val' may be a Constant
+/// or a GlobalValue, viz., the constant address of a global variable or
+/// function. The generated instructions are returned in `mvec'. Any temp.
+/// registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateCodeToLoadConst (const TargetMachine &target, Function *F,
+ Value *val, Instruction *dest, std::vector<MachineInstr*> &mvec,
+ MachineCodeForInstruction &mcfi);
+
+/// CreateSignExtensionInstructions - Create instruction sequence to produce a
+/// sign-extended register value from an arbitrary sized value (sized in bits,
+/// not bytes). The generated instructions are appended to `mvec'. Any temp.
+/// registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateSignExtensionInstructions (const TargetMachine &target,
+ Function *F, Value *srcVal, Value *destVal, unsigned int numLowBits,
+ std::vector<MachineInstr*> &mvec, MachineCodeForInstruction &mcfi);
+
+/// CreateZeroExtensionInstructions - Create instruction sequence to produce a
+/// zero-extended register value from an arbitrary sized value (sized in bits,
+/// not bytes). The generated instructions are appended to `mvec'. Any temp.
+/// registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateZeroExtensionInstructions (const TargetMachine &target,
+ Function *F, Value *srcVal, Value *destVal, unsigned int numLowBits,
+ std::vector<MachineInstr*> &mvec, MachineCodeForInstruction &mcfi);
+
+/// CreateCodeToCopyIntToFloat - Create an instruction sequence to copy an
+/// integer value `val' to a floating point value `dest' by copying to memory
+/// and back. val must be an integral type. dest must be a Float or Double.
+/// The generated instructions are returned in `mvec'. Any temp. registers
+/// (TmpInstruction) created are recorded in mcfi.
+///
+void CreateCodeToCopyIntToFloat (const TargetMachine &target,
+ Function *F, Value *val, Instruction *dest, std::vector<MachineInstr*> &mvec,
+ MachineCodeForInstruction &mcfi);
+
+/// CreateCodeToCopyFloatToInt - Create an instruction sequence to copy an FP
+/// value `val' to an integer value `dest' by copying to memory and back. The
+/// generated instructions are returned in `mvec'. Any temp. registers
+/// (TmpInstruction) created are recorded in mcfi.
+///
+void CreateCodeToCopyFloatToInt (const TargetMachine &target, Function *F,
+ Value *val, Instruction *dest, std::vector<MachineInstr*> &mvec,
+ MachineCodeForInstruction &mcfi);
+
+/// CreateCopyInstructionsByType - Create instruction(s) to copy src to dest,
+/// for arbitrary types The generated instructions are returned in `mvec'. Any
+/// temp. registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateCopyInstructionsByType (const TargetMachine &target,
+ Function *F, Value *src, Instruction *dest, std::vector<MachineInstr*> &mvec,
+ MachineCodeForInstruction &mcfi);
+
+/// CreateSignExtensionInstructions - Create instruction sequence to produce a
+/// sign-extended register value from an arbitrary sized value (sized in bits,
+/// not bytes). The generated instructions are appended to `mvec'. Any temp.
+/// registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateSignExtensionInstructions (const TargetMachine &target,
+ Function *F, Value *srcVal, Value *destVal, unsigned int numLowBits,
+ std::vector<MachineInstr*> &mvec, MachineCodeForInstruction &mcfi);
+
+/// CreateZeroExtensionInstructions - Create instruction sequence to produce a
+/// zero-extended register value from an arbitrary sized value (sized in bits,
+/// not bytes). The generated instructions are appended to `mvec'. Any temp.
+/// registers (TmpInstruction) created are recorded in mcfi.
+///
+void CreateZeroExtensionInstructions (const TargetMachine &target,
+ Function *F, Value *srcVal, Value *destVal, unsigned int numLowBits,
+ std::vector<MachineInstr*> &mvec, MachineCodeForInstruction &mcfi);
+
} // End llvm namespace
#endif