diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 18:42:51 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 18:42:51 +0000 |
commit | 0fda545c2c164dc607f48f4b77f54c35bcafa413 (patch) | |
tree | b84ef704194fb186aeefb5f9aa89a3f6699857ac | |
parent | 92d63ccfc7d86d39bc0b806bf7e9fac13dd2d7b5 (diff) |
Constrain register classes in TailDup.
When rewriting operands, make sure the new registers have a compatible
register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157163 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/TailDuplication.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/CodeGen/TailDuplication.cpp b/lib/CodeGen/TailDuplication.cpp index 8ebfbcae78..3e203850f9 100644 --- a/lib/CodeGen/TailDuplication.cpp +++ b/lib/CodeGen/TailDuplication.cpp @@ -272,8 +272,8 @@ TailDuplicatePass::TailDuplicateAndUpdate(MachineBasicBlock *MBB, continue; unsigned Dst = Copy->getOperand(0).getReg(); unsigned Src = Copy->getOperand(1).getReg(); - MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src); - if (++UI == MRI->use_end()) { + if (MRI->hasOneNonDBGUse(Src) && + MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) { // Copy is the only use. Do trivial copy propagation here. MRI->replaceRegWith(Dst, Src); Copy->eraseFromParent(); @@ -429,8 +429,10 @@ void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI, AddSSAUpdateEntry(Reg, NewReg, PredBB); } else { DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg); - if (VI != LocalVRMap.end()) + if (VI != LocalVRMap.end()) { MO.setReg(VI->second); + MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg)); + } } } PredBB->insert(PredBB->instr_end(), NewMI); |