diff options
author | Chris Lattner <sabre@nondot.org> | 2009-04-12 07:26:51 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2009-04-12 07:26:51 +0000 |
commit | 0461c0a8f5b476794a061e995210906670a4542d (patch) | |
tree | de0de1c05bdc84d3cca90340f1289df096d8b307 | |
parent | f5b6bc7f0ec90bf5312b1e65777a54bba2da3c5d (diff) |
Add new TargetInstrDesc::hasImplicitUseOfPhysReg and
hasImplicitDefOfPhysReg methods. Use them to remove a
look in X86 fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68886 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetInstrDesc.h | 18 | ||||
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 18 |
2 files changed, 21 insertions, 15 deletions
diff --git a/include/llvm/Target/TargetInstrDesc.h b/include/llvm/Target/TargetInstrDesc.h index b389a4f746..622a216c33 100644 --- a/include/llvm/Target/TargetInstrDesc.h +++ b/include/llvm/Target/TargetInstrDesc.h @@ -199,6 +199,24 @@ public: const unsigned *getImplicitDefs() const { return ImplicitDefs; } + + /// hasImplicitUseOfPhysReg - Return true if this instruction implicitly + /// uses the specified physical register. + bool hasImplicitUseOfPhysReg(unsigned Reg) const { + if (const unsigned *ImpUses = ImplicitUses) + for (; *ImpUses; ++ImpUses) + if (*ImpUses == Reg) return true; + return false; + } + + /// hasImplicitDefOfPhysReg - Return true if this instruction implicitly + /// defines the specified physical register. + bool hasImplicitDefOfPhysReg(unsigned Reg) const { + if (const unsigned *ImpDefs = ImplicitDefs) + for (; *ImpDefs; ++ImpDefs) + if (*ImpDefs == Reg) return true; + return false; + } /// getRegClassBarriers - Return a list of register classes that are /// completely clobbered by this machine instruction. For example, on X86 diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 7b114ddbc3..0146b0730d 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -808,21 +808,9 @@ bool X86FastISel::X86SelectBranch(Instruction *I) { } const TargetInstrDesc &TID = MI.getDesc(); - const unsigned *ImpDefs = TID.getImplicitDefs(); - - if (TID.hasUnmodeledSideEffects()) break; - - bool ModifiesEFlags = false; - - if (ImpDefs) { - for (unsigned u = 0; ImpDefs[u]; ++u) - if (ImpDefs[u] == X86::EFLAGS) { - ModifiesEFlags = true; - break; - } - } - - if (ModifiesEFlags) break; + if (TID.hasUnmodeledSideEffects() || + TID.hasImplicitDefOfPhysReg(X86::EFLAGS)) + break; } if (SetMI) { |