Add/Sub/Mul are safe to promote here as well. Incrementing a single-bit

bitfield now gives this code:

_plus:
        lwz r2, 0(r3)
        rlwimi r2, r2, 0, 1, 31
        xoris r2, r2, 32768
        stw r2, 0(r3)
        blr

instead of this:

_plus:
        lwz r2, 0(r3)
        srwi r4, r2, 31
        slwi r4, r4, 31
        addis r4, r4, -32768
        rlwimi r2, r4, 0, 0, 0
        stw r2, 0(r3)
        blr

this can obviously still be improved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28275 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 6 insertions, 0 deletions

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index f25ac97ef5..99a000fa92 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -4793,6 +4793,9 @@ static bool CanEvaluateInDifferentType(Value *V, const Type *Ty,
   if (!I || !I->hasOneUse()) return false;
   
   switch (I->getOpcode()) {
+  case Instruction::Add:
+  case Instruction::Sub:
+  case Instruction::Mul:
   case Instruction::And:
   case Instruction::Or:
   case Instruction::Xor:
@@ -4824,6 +4827,9 @@ Value *InstCombiner::EvaluateInDifferentType(Value *V, const Type *Ty) {
   Instruction *I = cast<Instruction>(V);
   Instruction *Res;
   switch (I->getOpcode()) {
+  case Instruction::Add:
+  case Instruction::Sub:
+  case Instruction::Mul:
   case Instruction::And:
   case Instruction::Or:
   case Instruction::Xor: {