aboutsummaryrefslogtreecommitdiff
path: root/lib/Basic/Targets.cpp
AgeCommit message (Collapse)Author
2014-04-25Introduce an Emscripten C++ ABI.Dan Gohman
Emscripten uses the Itanium C++ ABI for most things, except that it uses ARM C++ ABI pointers to member functions, to avoid the overhead of aligning functions.
2014-04-09set the emscripten backend's atomic widths to 32Alon Zakai
2014-03-03Set the natural stack alignment for asm.js to 16 bytes.Dan Gohman
2014-02-24Introduce the asmjs-unknown-emscripten target triple.Dan Gohman
Notable changes from le32-unknown-nacl so far include: - Set i32 as the legal integer set, to help the optimizer avoid creating needlessly inefficient code for asm.js. - We can use llvm.pow. - Don't predefine __ELF__ or __pnacl__ so that we don't need to undefine them later. - Do predefine asm.js and Emscripten macros, so that we don't need to define them later. - Don't provide __has_feature(pnacl).
2013-05-15Merging r181750:Bill Wendling
------------------------------------------------------------------------ r181750 | rafael | 2013-05-13 17:44:24 -0700 (Mon, 13 May 2013) | 4 lines Use atomic instructions on linux thumb v7. This matches gcc's behaviour. The patch also explicitly parses the version so that this keeps working when we add support for v8. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_33@181920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-15Merging r181728:Bill Wendling
------------------------------------------------------------------------ r181728 | rafael | 2013-05-13 13:09:47 -0700 (Mon, 13 May 2013) | 6 lines Use atomic instructions on ARM linux. This is safe given how the pre-v6 atomic ops funcions in libgcc are implemented. This fixes pr15429. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_33@181919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Add SystemZ supportUlrich Weigand
This patch then adds all the usual platform-specific pieces for SystemZ: driver support, basic target info, register names and constraints, ABI info and vararg support. It also adds new tests to verify pre-defined macros and inline asm, and updates a test for the minimum alignment change. This version of the patch incorporates feedback from reviews by Eric Christopher and John McCall. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@181211 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: teach Clang about __clear_cache intrinsicTim Northover
libgcc provides a __clear_cache intrinsic on AArch64, much like it does on 32-bit ARM. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@181111 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Add support for -march=btver2.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@181006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-24Add some more required SPARC v9 predefined macros.Jakob Stoklund Olesen
Solaris/AuroraUX only need __arch64__, the BSDs need the other variants. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@180172 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Add support for sparcv9 targets.Jakob Stoklund Olesen
The SPARC v8 and SPARC v8 architectures are very similar, so use a base class to share most information between them. Include operating systems with known SPARC v9 ports. Also fix two issues with the SPARC v8 data layout string: SPARC v8 is a big endian target with a 64-bit aligned stack. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@179596 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-14[Mips] Support -mmicromips / -mno-micromips command line options.Simon Atanasyan
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@179489 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-14[Mips] Follow-up to r179481. Consider "single-float" as a separateSimon Atanasyan
independent of float ABI feature in the MipsTargetInfoBase class. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@179486 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-08The PNaCl target no longer permits __attribute__((regparm)).Eli Bendersky
Remove the custom lowering code dealing with it, disallow it in PNaclTargetInfo and adjust tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@179059 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05AArch64: bring predefines in line with most recent ACLE documentTim Northover
The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-04Add support for __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} on x86.Michael J. Spencer
This fixes std::thread with libstdc++. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01R600: Add missing Southern Islands GPU to setCPU() functionTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178498 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-30Remove old NVPTX cpus and add new NVPTX cpusJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-30Add support for gcc-compatible -mfprnd -mno-fprnd PPC optionsHal Finkel
gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target feature; support these options as well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-29Add RDSEED intrinsic support defined in AVX2 extensionMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Add support for gcc-compatible -mpopcntd -mno-popcntd PPC optionsHal Finkel
gcc provides -mpopcntd and -mno-popcntd for controlling the popcntd target feature; support these options as well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Add support for gcc-compatible -mmfcrf -mno-mfcrf PPC optionsHal Finkel
gcc provides -mmfcrf and -mno-mfcrf for controlling what we call the mfocrf target feature. Also, PPC is now making use of the static function AddTargetFeature used by the Mips Driver code. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Add PRFCHW intrinsic supportMichael Liao
- Add head 'prfchwintrin.h' to define '_m_prefetchw' which is mapped to LLVM/clang prefetch builtin - Add option '-mprfchw' to enable PRFCHW feature and pre-define '__PRFCHW__' macro git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@178041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Remove driver support for Hexagon V2 and V3Matthew Curtis
Driver will now error when trying to compile for V2 or V3. Removal of V2 and V3 support will allow us to simplify the hexagon back-end. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07Add 'e' to the SPIR data layout - SPIR is little endian for now.Guy Benyei
Add 32/64 bit specific target defines for SPIR. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176629 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05Mips specific inline assembler constraint 'R'Jack Carter
'R' An address that can be sued in a non-macro load or store. Including missing positive test case and fixed typo for r176453. Thanks to Richard Smith for catching this! Jack git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176506 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04Tidy up lists of Cortex-A series processors, adding entries for A7.Bob Wilson
Also fix a missing entry for cortex-r5 in one copy of getLLVMArchSuffixForARM. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04Mips specific inline assembler constraint 'R'Jack Carter
'R' An address that can be sued in a non-macro load or store. This patch includes a positive test case. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176453 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04R600: Use the GPU type to determine the correct DataLayout v2Tom Stellard
v2: - Add R600_DOUBLE_OPS for RV670 - s/CPU/GPU/ Reviewed-by: Alex Deucher <alexander.deucher@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27[Mips] Add two new aliases for MIPS ABI names 32 (means o32 abi) and 64Simon Atanasyan
(means n64 abi) to improve compatibility with GNU tools. Patch by Jia Liu <proljc@gmail.com>. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Implement __builtin_eh_return_data_regno() for ARM and MIPS.Logan Chien
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Revert r175912, "Add support for coldcc to clang" at John's request.Peter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Add support for coldcc to clangPeter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Revert "intmax_t is long long on Darwin, not long."Jordan Rose
'long' and 'long long' are different for the purposes of mangling. This caused <rdar://problem/13254874>. This reverts commit c2f994d31ec85e9af811af38eb1b28709aef0b2c. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175681 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20intmax_t is long long on Darwin, not long.Jordan Rose
<rdar://problem/11540697> git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18AArch64: add atomic support parameters to TargetInfoTim Northover
This allows Clang to detect and deal wih __atomic_* operations properly on AArch64. Previously we produced an error when encountering them at high optimisation levels. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@175438 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Add some missing PPC cpusBill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Add -mqpx and -mno-qpx feature flags to toggle use of the PPC QPX vector ↵Hal Finkel
instruction set I've renamed the altivec test to ppc-features (because now there is more than one feature to test). git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174204 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Add PPC A2Q core and BG/Q preprocessor definitionsHal Finkel
The a2q core is the variant of the a2 core used on the BG/Q supercomputers. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01Enable -fno-altivec, -mno-altivec for PowerPC.Bill Schmidt
Introduces these negation forms explicitly and uses them to control a new "altivec" target feature for PowerPC. This allows avoiding generating Altivec instructions on processors that support Altivec. The new test case verifies that the Altivec "lvx" instruction is not used when -fno-altivec is present on the command line. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174140 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Add support for AArch64 target.Tim Northover
In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@174055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-25First pass at abstracting out a class for the target C++ ABI.John McCall
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@173514 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22PowerPC: fix __builtin_eh_return_data_regno returnAdhemerval Zanella
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@173188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18[mips] Enable inlining of atomic ops on mips32 and mips64.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@172855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-18[ubsan] Add support for -fsanitize-blacklistWill Dietz
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@172808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12Remove useless 'llvm::' qualifier from names like StringRef and others that areDmitri Gribenko
brought into 'clang' namespace by clang/Basic/LLVM.h git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@172323 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-10Enable intel_ocl_bicc for x86_64 target only. Remove fix from 171969 that ↵Guy Benyei
enabled this extension for multiple targets. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@172052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05[mips] Fix data layout string. Add 64 to the list of native integer widthsAkira Hatanaka
and add stack alignment information. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@171588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02Correct Hexagon DataLayout string. Fixes bug 14744.Anshuman Dasgupta
Patch by Krzysztof Parzyszek! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@171415 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02Rewrite #includes for llvm/Foo.h to llvm/IR/Foo.h as appropriate toChandler Carruth
reflect the migration in r171366. Re-sort the #include lines to reflect the new paths. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@171369 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-11-27 22:06:09 +0000